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[11/14] arm64: dts: qcom: sdm845: Remove superfluous "input-enable"s from cheza

Message ID 20230323102605.11.Ia439c29517b1c0625325a54387b047f099d16425@changeid
State New
Headers show
Series Control Quad SPI pinctrl better on Qualcomm Chromebooks | expand

Commit Message

Douglas Anderson March 23, 2023, 5:30 p.m. UTC
As talked about in the patch ("dt-bindings: pinctrl: qcom: tlmm should
use output-disable, not input-enable"), using "input-enable" in
pinctrl states for Qualcomm TLMM pinctrl devices was either
superfluous or there to disable a pin's output.

Looking at cheza
* ec_ap_int_l, h1_ap_int_odl: Superfluous. The pins will be configured
  as inputs automatically by the Linux GPIO subsystem (presumably the
  reference for other OSes using these device trees).
* bios_flash_wp_l: Superfluous. This pin is exposed to userspace
  through the kernel's GPIO API and will be configured automatically.

That means that in none of the cases for cheza did we need to change
"input-enable" to "output-disable" and we can just remove these
superfluous properties.

Signed-off-by: Douglas Anderson <dianders@chromium.org>

 arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 3 ---
 1 file changed, 3 deletions(-)
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diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
index f2b48241d15c..588165ee74b3 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
@@ -1155,14 +1155,12 @@  ap_edp_bklten: ap-edp-bklten-state {
 	bios_flash_wp_r_l: bios-flash-wp-r-l-state {
 		pins = "gpio128";
 		function = "gpio";
-		input-enable;
 	ec_ap_int_l: ec-ap-int-l-state {
 	       pins = "gpio122";
 	       function = "gpio";
-	       input-enable;
@@ -1190,7 +1188,6 @@  en_pp3300_dx_edp: en-pp3300-dx-edp-state {
 	h1_ap_int_odl: h1-ap-int-odl-state {
 		pins = "gpio129";
 		function = "gpio";
-		input-enable;