From patchwork Tue Apr 25 08:40:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 676965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81B4FC77B61 for ; Tue, 25 Apr 2023 08:45:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233774AbjDYIpE (ORCPT ); Tue, 25 Apr 2023 04:45:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233452AbjDYIo3 (ORCPT ); Tue, 25 Apr 2023 04:44:29 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4886ED325; Tue, 25 Apr 2023 01:42:19 -0700 (PDT) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33P8EudQ013659; Tue, 25 Apr 2023 08:40:53 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=8dsutEia9Uf5cDAuSHkSz7OkYtRVXK1v5gmOfVmzUjY=; b=PPK0+EiOW6dhx1/B7vKJ/nW7X1nCWbqVUFD5ncxZ+7EbZJOkG5DHqI7QSURTGRGMsJ14 nCGMKuLxSaQGWeM7f/QMSIrR69/p0KM65TuoZNfqlRnr8fKWB7EijLZRVPkqcalwysMy ZuOR9WVdt2PkDJlS1JrMO5H8tIWNdEK890bEaMhOe1KMiYpzQ6UaYKeQuU2DPzW/FHpu OS2fKvyhKbDQQcT2tRxvnee+cBijqYoxDk7OLYWuHAzjuPXauVo23gPsmnSgLCdIlIIp cEx6tvwsDhUHqUgywg+FvP55UGOPVQKtg/A9Ol59ory7WVQahWq7B5Dp/WloRNiH94G3 CA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q5tk4j5qn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 25 Apr 2023 08:40:53 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33P8ebt9014926 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 25 Apr 2023 08:40:37 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 25 Apr 2023 01:40:31 -0700 From: Devi Priya To: , , , , , , , , , , CC: , , , , , Subject: [PATCH V3 1/6] arm64: dts: qcom: ipq9574: Update the size of GICC & GICV regions Date: Tue, 25 Apr 2023 14:10:05 +0530 Message-ID: <20230425084010.15581-2-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230425084010.15581-1-quic_devipriy@quicinc.com> References: <20230425084010.15581-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gJiL2Vrt-onhiLTcbdBHqXrk3jlUPiRg X-Proofpoint-GUID: gJiL2Vrt-onhiLTcbdBHqXrk3jlUPiRg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-25_03,2023-04-21_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 mlxlogscore=586 suspectscore=0 clxscore=1015 malwarescore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304250076 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update the size of GICC and GICV regions to 8kB as the GICC_DIR & GICV_DIR registers lie in the second 4kB region. Also, add target CPU encoding. Fixes: 97cb36ff52a1 ("arm64: dts: qcom: Add ipq9574 SoC and AL02 board support") Signed-off-by: Devi Priya --- Changes in V3: - Split the intc changes to a separate patch and added Fixes tag. arch/arm64/boot/dts/qcom/ipq9574.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 3bb7435f5e7f..7e0a16d490f9 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -172,14 +172,14 @@ intc: interrupt-controller@b000000 { compatible = "qcom,msm-qgic2"; reg = <0x0b000000 0x1000>, /* GICD */ - <0x0b002000 0x1000>, /* GICC */ + <0x0b002000 0x2000>, /* GICC */ <0x0b001000 0x1000>, /* GICH */ - <0x0b004000 0x1000>; /* GICV */ + <0x0b004000 0x2000>; /* GICV */ #address-cells = <1>; #size-cells = <1>; interrupt-controller; #interrupt-cells = <3>; - interrupts = ; + interrupts = ; ranges = <0 0x0b00c000 0x3000>; v2m0: v2m@0 {