From patchwork Wed Apr 26 19:22:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhinav Kumar X-Patchwork-Id: 677147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F193DC7618E for ; Wed, 26 Apr 2023 19:23:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234635AbjDZTX0 (ORCPT ); Wed, 26 Apr 2023 15:23:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233549AbjDZTXZ (ORCPT ); Wed, 26 Apr 2023 15:23:25 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB67810FC; Wed, 26 Apr 2023 12:23:05 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33QJ18HO003102; Wed, 26 Apr 2023 19:23:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=ohCHxWuUVY7OO8meTKcLOoiLqkpM2lzEy7Qranv9Erk=; b=K+I+DvnO1FgAyM68qt7+PQwY9kBIf0a9ut6gBWfvbmISsJgcPU471GgIhp5oibxEvXtj KFyybefj1pQnoP+9cEnP4K0shJoyC39ldpm1rW3rG2rZWI+7PgIOUnLtxoiZ6/M4q5RF xGIIFBlNuDPGYFy/ZNDbabKmX2TpH0SVvcuJKKwq2k2F2wxNa3eSGOyNhBhbi3G2H70T zhn3yTGhcJhKldFmE5dvD2Lq5O6BgIIQuiSTPTBKeH2kDFW2YtunvDmBATMYVqDhmgC0 /kign7b3FFUn4An4meUj89b7qYN5UB0ILA8LfC4VNxviR3RjjLIfI79wWz2f8JBRP+ui 2Q== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q7237h7cg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Apr 2023 19:23:00 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33QJMx6K032591 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Apr 2023 19:22:59 GMT Received: from abhinavk-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 26 Apr 2023 12:22:58 -0700 From: Abhinav Kumar To: , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter CC: , , , , Subject: [PATCH v2 2/4] drm/msm/dpu: remove DPU_DSPP_IGC handling in dspp flush Date: Wed, 26 Apr 2023 12:22:44 -0700 Message-ID: <20230426192246.5517-2-quic_abhinavk@quicinc.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230426192246.5517-1-quic_abhinavk@quicinc.com> References: <20230426192246.5517-1-quic_abhinavk@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: d2PCwUWus8Txw9DX4cJBYZ2zigniy05y X-Proofpoint-ORIG-GUID: d2PCwUWus8Txw9DX4cJBYZ2zigniy05y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-26_10,2023-04-26_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=841 adultscore=0 bulkscore=0 phishscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304260172 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Inverse gamma correction blocks (IGC) are not used today so lets remove the usage of DPU_DSPP_IGC in the dspp flush to make it easier to remove IGC from the catalog. We can add this back when IGC is properly supported in DPU with one of the standard DRM properties. Signed-off-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 57adaebab563..b2a1f83ac72c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -330,9 +330,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( return; switch (dspp_sub_blk) { - case DPU_DSPP_IGC: - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(2); - break; case DPU_DSPP_PCC: ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); break;