From patchwork Fri Jun 9 05:41:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parikshit Pareek X-Patchwork-Id: 690979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D33E3C7EE25 for ; Fri, 9 Jun 2023 05:43:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236109AbjFIFnu (ORCPT ); Fri, 9 Jun 2023 01:43:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229493AbjFIFnt (ORCPT ); Fri, 9 Jun 2023 01:43:49 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00C7A270B; Thu, 8 Jun 2023 22:43:48 -0700 (PDT) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3594bDBD027801; Fri, 9 Jun 2023 05:43:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=JqWno6sWd3z7g4PHP4xtwfjXlXVXiieQ6c2PMMVUnVI=; b=h4Lm3Ejgnig9ay9q57Ggb9bHYZrxFX4/QJqVAQcKpVsmIbg/YX3kup5fhLTnBTag6Xub fF46pHqdWcERASaD1nZ7kQbhXZLdzOh7fjl5yC7Uu4yahKeW9fUnlXrFB4zAKs4rQ4Nm ZZL/h/B2+iGMR/4RQAocMG16Xg6Mw0jA/X/jH82XdnkCT1K6ndSh3KpQ/adfdk9nT5GC VM6F4PC2L5uqZc8eN08ppl0AvbvvMoYSOLXS5rmj54XykpRLzTa9lb/zdiVsDkF6gQno 9ZymtBd8+p3LN7K4FsEDMbTkbzN2Eu4Jf24xXkNHPO43n4j8N3S2DW+7RJnp56TZ+MBi XA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3r3w7dr3t3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 09 Jun 2023 05:43:34 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3595hXuw027659 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 9 Jun 2023 05:43:33 GMT Received: from hu-ppareek-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 8 Jun 2023 22:43:27 -0700 From: Parikshit Pareek To: Will Deacon , Robin Murphy , "Joerg Roedel" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Manivannan Sadhasivam , Dmitry Baryshkov , Marijn Suijten , Adam Skladowski , , , , , "linux-kernel @ vger . kernel . org Prasanna Kumar" , Shazad Hussain , Parikshit Pareek Subject: [PATCH 2/3] arm64: dts: qcom: sa8775p: Add interconnect to PCIe SMMU Date: Fri, 9 Jun 2023 11:11:41 +0530 Message-ID: <20230609054141.18938-3-quic_ppareek@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230609054141.18938-1-quic_ppareek@quicinc.com> References: <20230609054141.18938-1-quic_ppareek@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YcfMlfEhbts9EiUZmDTRXNmahaPwH2ex X-Proofpoint-ORIG-GUID: YcfMlfEhbts9EiUZmDTRXNmahaPwH2ex X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-09_03,2023-06-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 spamscore=0 impostorscore=0 phishscore=0 adultscore=0 mlxlogscore=700 lowpriorityscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306090049 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Introduce the interconnect, connecting PCIe SMMU to the memory. This is accessed during memory mapped IO access of smmu registers, and during page table walks. Reported-by: Eric Chanudet Signed-off-by: Parikshit Pareek --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index b130136acffe..ea3c37019c46 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -2137,6 +2137,10 @@ , , ; + interconnects = <&pcie_anoc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "tbu_mc"; + icc_bw = <250>; }; intc: interrupt-controller@17a00000 {