From patchwork Wed Jul 5 19:30:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan McCann X-Patchwork-Id: 699279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8130CEB64DD for ; Wed, 5 Jul 2023 19:32:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234264AbjGETcd (ORCPT ); Wed, 5 Jul 2023 15:32:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234252AbjGETc2 (ORCPT ); Wed, 5 Jul 2023 15:32:28 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7B23170F; Wed, 5 Jul 2023 12:32:24 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 365IqZ9A031635; Wed, 5 Jul 2023 19:32:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : date : subject : mime-version : content-type : content-transfer-encoding : message-id : references : in-reply-to : to : cc; s=qcppdkim1; bh=1JzPSoZJckkd7Y21bVZYQ72g3W2DwSgQMpvhPfrTlvk=; b=fLjFbeHqTWfxz+KfQQSsWvo2sT2WmnOU/ui2ACots8s2XhLvuJVE4gMuBu803rbe2wW9 TPVLWYHeqL2T2PXvc5Cj7ldzmqYzT2KbH4ihOojpd4G5frFZSfbo4J8EHOY7oO3DxjW6 9QlKqUsqy+AjOXr8ALlL+uVROtIuOQ8E/bnPNA9L1MHBtPK+zhWsc3rV5EXCFTC9u2to xazXZ0kwx+ugr2tU1TcelUEkFA/QiQSD0hbGTTOKXGtXOIFu6Li6i8HueKVNls5R3By1 UilvsFa6Th01jXhM+3zfHrChRnnz86099obOzmjYgDtQaSERtVZbR3vt3IxIm5Yva9sr 4w== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rndvp02x6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 05 Jul 2023 19:32:13 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 365JWDMV027824 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 5 Jul 2023 19:32:13 GMT Received: from hu-rmccann-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.7; Wed, 5 Jul 2023 12:32:12 -0700 From: Ryan McCann Date: Wed, 5 Jul 2023 12:30:16 -0700 Subject: [PATCH v2 2/5] drm/msm/dpu: Drop unused num argument from relevant macros MIME-Version: 1.0 Message-ID: <20230622-devcoredump_patch-v2-2-9e90a87d393f@quicinc.com> References: <20230622-devcoredump_patch-v2-0-9e90a87d393f@quicinc.com> In-Reply-To: <20230622-devcoredump_patch-v2-0-9e90a87d393f@quicinc.com> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter CC: Rob Clark , , , , , , Ryan McCann X-Mailer: b4 0.13-dev-8a804 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688585532; l=3049; i=quic_rmccann@quicinc.com; s=20230622; h=from:subject:message-id; bh=CpdF5cD0gabOxMJ5VVHNTKLJ+uw3DSEoSpiCHhpgYXA=; b=4msyVa8vrrJOx+NembddTQWL21qLUTlPOpLYZ3Jrf0cpBbPQmdBO8Mu971EKFFK3eIunF6MXZ U/vy0IocMigAMrS5YPBbZJE36yBmEJ/NZmSqvn9MhExmnpZNz0lfmnL X-Developer-Key: i=quic_rmccann@quicinc.com; a=ed25519; pk=d/uP3OwPGpj/bTtiHvV1RBZ2S6q4AL6j1+A5y+dmbTI= X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: WMU4AR7tOy0iTgqBu8zbsRm3V1Dok9RP X-Proofpoint-GUID: WMU4AR7tOy0iTgqBu8zbsRm3V1Dok9RP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-05_10,2023-07-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 mlxscore=0 malwarescore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 spamscore=0 phishscore=0 bulkscore=0 mlxlogscore=799 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307050178 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Drop unused parameter "num" from VIG_SBLK_NOSCALE and DMA sub-block macros. Update calls to relevant macros to reflect change. Signed-off-by: Ryan McCann --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 0de507d4d7b7..9f9d5ac3992f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -288,7 +288,7 @@ static const uint32_t wb2_formats[] = { .rotation_cfg = rot_cfg, \ } -#define _DMA_SBLK(num, sdma_pri) \ +#define _DMA_SBLK(sdma_pri) \ { \ .maxdwnscale = SSPP_UNITY_SCALE, \ .maxupscale = SSPP_UNITY_SCALE, \ @@ -323,10 +323,10 @@ static const struct dpu_sspp_sub_blks sdm845_vig_sblk_2 = static const struct dpu_sspp_sub_blks sdm845_vig_sblk_3 = _VIG_SBLK("3", 8, DPU_SSPP_SCALER_QSEED3); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK("8", 1); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK("9", 2); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK("10", 3); -static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK("11", 4); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_0 = _DMA_SBLK(1); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_1 = _DMA_SBLK(2); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_2 = _DMA_SBLK(3); +static const struct dpu_sspp_sub_blks sdm845_dma_sblk_3 = _DMA_SBLK(4); #define SSPP_BLK(_name, _id, _base, _len, _features, \ _sblk, _xinid, _type, _clkctrl) \ @@ -366,10 +366,10 @@ static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 = _VIG_SBLK("2", 9, DPU_SSPP_SCALER_QSEED4); static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 = _VIG_SBLK("3", 10, DPU_SSPP_SCALER_QSEED4); -static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK("12", 5); -static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK("13", 6); +static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = _DMA_SBLK(5); +static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK(6); -#define _VIG_SBLK_NOSCALE(num, sdma_pri) \ +#define _VIG_SBLK_NOSCALE(sdma_pri) \ { \ .maxdwnscale = SSPP_UNITY_SCALE, \ .maxupscale = SSPP_UNITY_SCALE, \ @@ -380,8 +380,8 @@ static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = _DMA_SBLK("13", 6); .virt_num_formats = ARRAY_SIZE(plane_formats), \ } -static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE("0", 2); -static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK("8", 1); +static const struct dpu_sspp_sub_blks qcm2290_vig_sblk_0 = _VIG_SBLK_NOSCALE(2); +static const struct dpu_sspp_sub_blks qcm2290_dma_sblk_0 = _DMA_SBLK(1); /************************************************************* * MIXER sub blocks config