From patchwork Tue Jul 4 15:03:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 698990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22DF7EB64D9 for ; Tue, 4 Jul 2023 15:04:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231583AbjGDPEE (ORCPT ); Tue, 4 Jul 2023 11:04:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231544AbjGDPED (ORCPT ); Tue, 4 Jul 2023 11:04:03 -0400 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20A95E6 for ; Tue, 4 Jul 2023 08:04:02 -0700 (PDT) Received: by mail-lj1-x229.google.com with SMTP id 38308e7fff4ca-2b6994a8ce3so84792481fa.1 for ; Tue, 04 Jul 2023 08:04:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688483040; x=1691075040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j+aq1OFXpf6G4H+BcGCSA0YL933rxkAV4l8sCcsEZis=; b=kXqNbmDflyvlxSx/8Rxgxa3xl2Z07elSrH3JpkankgIT7FrzGdcA7mYlbzfsHTWmYo pET1u6dnJuES4DmSg+qrQJOxQtHDWtMRgm0rec5RwVU4XJaLWjZIRjuJePuRWJH+lY+M fNugozyvnotBtqAzASefM+bcs2PSgYptOIBXiNuT8K0Wf9Qi0yP8loXGAsa1OzlN3E6+ CTOljsTgLTlYA//5a9R1ECZtwGVPQjQTWBJXmAUdIq9ujozTxCKVU62XJL5u7dXk5Wwj ZaCtWG5ccK50E4CTDivHLXsVLyJI2fOw2joWCokbiVIgm3VErUa3V95PvdMSrctAfcOn 87fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688483040; x=1691075040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j+aq1OFXpf6G4H+BcGCSA0YL933rxkAV4l8sCcsEZis=; b=jOiOlYv5d2QIKZbH++xLGgx7U8vPGvtoS0rsm0xZrDAkMXED3xD5LSnKbO1R3K1bvN hWdsz0dqzwfAFe3zH/BB4MygFCXnjmlMGGIZcAOuZkk3acU3G2SVTQcv9W+wTBXjiI4m ctxL1oibUyerefXDWsBQEQq2N69skHg+DNVnMFgKXbDuImj9ikgHPc+/eRBAUoBTpcQO MmHBFIGlEkb+4RBe9qhd1YjguDU8rnW332TpN3CA7ltn0RIyNMb1bHcuu4w31YFrNC9W J/HzlKPef0k5S3LgU0nkJSXI8ayKP6ACx2amdKx50WQb0CR6NRzwQ86FM1elTP932rO+ 380A== X-Gm-Message-State: ABy/qLZMUgMhvVsan6Dh9dYAMer/P0yqcZukf2Cv3JHuwAjSkJZp0Byb ju9GwlwFA6xe3M1lGU61TjH8nw== X-Google-Smtp-Source: APBJJlHHe490LvEGHTlSi9065fHYlPgN0olmh74EqKOJJUaIUc6IiWX0RLYGd7CBpnAIQIFXbc0RZw== X-Received: by 2002:a2e:910c:0:b0:2b6:a22f:9fb9 with SMTP id m12-20020a2e910c000000b002b6a22f9fb9mr9419715ljg.27.1688483040418; Tue, 04 Jul 2023 08:04:00 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j10-20020a2e850a000000b002b6ca539d92sm3337354lji.138.2023.07.04.08.03.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Jul 2023 08:03:59 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 06/14] drm/msm/dpu: rework core_perf debugfs overrides Date: Tue, 4 Jul 2023 18:03:46 +0300 Message-Id: <20230704150354.159882-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230704150354.159882-1-dmitry.baryshkov@linaro.org> References: <20230704150354.159882-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently debugfs provides separate 'modes' to override calculated MDP_CLK rate and interconnect bandwidth votes. Change that to allow overriding individual values (e.g. one can override just clock or just average bandwidth vote). Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 87 ++----------------- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 10 --- 2 files changed, 9 insertions(+), 88 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 42c03a5f1f3e..23a29f159eff 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -17,20 +17,6 @@ #include "dpu_crtc.h" #include "dpu_core_perf.h" -/** - * enum dpu_perf_mode - performance tuning mode - * @DPU_PERF_MODE_NORMAL: performance controlled by user mode client - * @DPU_PERF_MODE_MINIMUM: performance bounded by minimum setting - * @DPU_PERF_MODE_FIXED: performance bounded by fixed setting - * @DPU_PERF_MODE_MAX: maximum value, used for error checking - */ -enum dpu_perf_mode { - DPU_PERF_MODE_NORMAL, - DPU_PERF_MODE_MINIMUM, - DPU_PERF_MODE_FIXED, - DPU_PERF_MODE_MAX -}; - /** * _dpu_core_perf_calc_bw() - to calculate BW per crtc * @kms: pointer to the dpu_kms @@ -229,18 +215,16 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, if (!kms->num_paths) return 0; - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) { - avg_bw = 0; - peak_bw = 0; - } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { + dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); + + avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/ + peak_bw = perf.max_per_pipe_ib; + + if (kms->perf.fix_core_ab_vote) avg_bw = kms->perf.fix_core_ab_vote; - peak_bw = kms->perf.fix_core_ib_vote; - } else { - dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); - avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/ - peak_bw = perf.max_per_pipe_ib; - } + if (kms->perf.fix_core_ib_vote) + peak_bw = kms->perf.fix_core_ib_vote; avg_bw /= kms->num_paths; @@ -294,12 +278,9 @@ static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms) struct drm_crtc *crtc; struct dpu_crtc_state *dpu_cstate; - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) + if (kms->perf.fix_core_clk_rate) return kms->perf.fix_core_clk_rate; - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) - return kms->perf.max_core_clk_rate; - drm_for_each_crtc(crtc, kms->dev) { if (crtc->enabled) { dpu_cstate = to_dpu_crtc_state(crtc->state); @@ -416,54 +397,6 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc, #ifdef CONFIG_DEBUG_FS -static ssize_t _dpu_core_perf_mode_write(struct file *file, - const char __user *user_buf, size_t count, loff_t *ppos) -{ - struct dpu_core_perf *perf = file->private_data; - u32 perf_mode = 0; - int ret; - - ret = kstrtouint_from_user(user_buf, count, 0, &perf_mode); - if (ret) - return ret; - - if (perf_mode >= DPU_PERF_MODE_MAX) - return -EINVAL; - - if (perf_mode == DPU_PERF_MODE_FIXED) { - DRM_INFO("fix performance mode\n"); - } else if (perf_mode == DPU_PERF_MODE_MINIMUM) { - /* run the driver with max clk and BW vote */ - DRM_INFO("minimum performance mode\n"); - } else if (perf_mode == DPU_PERF_MODE_NORMAL) { - /* reset the perf tune params to 0 */ - DRM_INFO("normal performance mode\n"); - } - perf->perf_tune.mode = perf_mode; - - return count; -} - -static ssize_t _dpu_core_perf_mode_read(struct file *file, - char __user *buff, size_t count, loff_t *ppos) -{ - struct dpu_core_perf *perf = file->private_data; - int len; - char buf[128]; - - len = scnprintf(buf, sizeof(buf), - "mode %d\n", - perf->perf_tune.mode); - - return simple_read_from_buffer(buff, count, ppos, buf, len); -} - -static const struct file_operations dpu_core_perf_mode_fops = { - .open = simple_open, - .read = _dpu_core_perf_mode_read, - .write = _dpu_core_perf_mode_write, -}; - int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) { struct dpu_core_perf *perf = &dpu_kms->perf; @@ -488,8 +421,6 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) (u32 *)&catalog->perf->min_llcc_ib); debugfs_create_u32("min_dram_ib", 0600, entry, (u32 *)&catalog->perf->min_dram_ib); - debugfs_create_file("perf_mode", 0600, entry, - (u32 *)perf, &dpu_core_perf_mode_fops); debugfs_create_u64("fix_core_clk_rate", 0600, entry, &perf->fix_core_clk_rate); debugfs_create_u64("fix_core_ib_vote", 0600, entry, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index c965dfbc3007..1b791b170c6b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -26,14 +26,6 @@ struct dpu_core_perf_params { u64 core_clk_rate; }; -/** - * struct dpu_core_perf_tune - definition of performance tuning control - * @mode: performance mode - */ -struct dpu_core_perf_tune { - u32 mode; -}; - /** * struct dpu_core_perf - definition of core performance context * @dev: Pointer to drm device @@ -42,7 +34,6 @@ struct dpu_core_perf_tune { * @core_clk: Pointer to the core clock * @core_clk_rate: current core clock rate * @max_core_clk_rate: maximum allowable core clock rate - * @perf_tune: debug control for performance tuning * @enable_bw_release: debug control for bandwidth release * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2 * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2 @@ -55,7 +46,6 @@ struct dpu_core_perf { struct clk *core_clk; u64 core_clk_rate; u64 max_core_clk_rate; - struct dpu_core_perf_tune perf_tune; u32 enable_bw_release; u64 fix_core_clk_rate; u64 fix_core_ib_vote;