From patchwork Sun Jul 9 04:19:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 700941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB8F4C04A6A for ; Sun, 9 Jul 2023 04:19:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229873AbjGIETf (ORCPT ); Sun, 9 Jul 2023 00:19:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229899AbjGIETc (ORCPT ); Sun, 9 Jul 2023 00:19:32 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 322E5E50 for ; Sat, 8 Jul 2023 21:19:31 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4fb77f21c63so5063837e87.2 for ; Sat, 08 Jul 2023 21:19:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688876369; x=1691468369; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=G37mRnxAmDfLHRjsoJiH2lfaRN1yCJAmwWkVf/vVExM=; b=MSjFfR2Yqddt6AN9cPktIfY2FTOfpTtcpUXud6FMc3ykg1bazMmqiBhS9Vvh91U6t6 nW2LUvwb5LajKe75NZYqEnRjrqyx5Bewyw6Ky5NOTp1Mpc2JliNPvM14/rIk3fOTcaPn iiADQd/fAlNHDg8JIXpa1ukntG5HeBSynS042fgv3HMfazvFYvvADqdv6nBI0HACcOct Q48DUUlCYli56fBC4km+Q3fkXHugvATEa39xo/qdaEp9mm2f2YbL2fz3MjKf4HkOJzVK bYX3VhX/bfhFFn1M1KLgfBgfgXD6N6G+qxKNVhUBQuCdLw4Yr+3paE+hc4te5XhHBW0I bCBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688876369; x=1691468369; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=G37mRnxAmDfLHRjsoJiH2lfaRN1yCJAmwWkVf/vVExM=; b=Pk/tacJ/BPDi64/LnRSYJgIyDKoa4Y+vGS+T+mPyWP2fna/U3HfjDYHbjimKbQv0nM Buop3g/vFFX9iSVzcb8mCgezqWRo2vP6s3tDc883kOixBzHuOdI3jUDovWhy844s3P0X x9wxdjyLF0auLKJwxSOe90vJXSE8rccrdyj7pXQGbVwUycx1BGTUwl+0Tu4xJfWkEH1X 0gwndiFtzzEJAKx98LPZ7V6WnEljAdwqCtu0DIY8x0so8pDhXTP7ODgyXqv6jd0OxI/W BfvLjOkGkNtrGBAKwzIHPf7ZeeDHmoTCrzVDcRrIQDxdUymSCF/p1Hye3moUKtx6uwgT SS2A== X-Gm-Message-State: ABy/qLZ161jTAzwSHllPOIDmWdTcSJQ/jW1srPAF6unpDOWdIhx+ZNuU RQXEVN9LvE9gk8C1bxMsdZCDsw== X-Google-Smtp-Source: APBJJlFZwjHJ4EdrlQ3Tr8UOVhqj88gp9bKjXK6m641B/6LfYmPOeQmNp2jeXu7Vj5145jfEjl2bBg== X-Received: by 2002:a05:6512:2384:b0:4fb:78b1:1cd4 with SMTP id c4-20020a056512238400b004fb78b11cd4mr8499077lfv.49.1688876369292; Sat, 08 Jul 2023 21:19:29 -0700 (PDT) Received: from lothlorien.lan (dzdqv0yyyyyyyyyyybm5y-3.rev.dnainternet.fi. [2001:14ba:a0db:1f00::ab2]) by smtp.gmail.com with ESMTPSA id r11-20020a19ac4b000000b004fb8603f6e0sm1205851lfc.12.2023.07.08.21.19.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jul 2023 21:19:28 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH 2/5] arm64: dts: qcom: sm8250: Add DisplayPort device node Date: Sun, 9 Jul 2023 07:19:23 +0300 Message-Id: <20230709041926.4052245-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230709041926.4052245-1-dmitry.baryshkov@linaro.org> References: <20230709041926.4052245-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Declare the displayport controller present on the Qualcomm SM8250 SoC. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 93 ++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index aaf3f6764fe8..89b3a24d402d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3626,6 +3626,12 @@ port@0 { port@1 { reg = <1>; }; + + port@2 { + reg = <2>; + + usb_1_qmpphy_dp_in: endpoint {}; + }; }; }; @@ -4270,6 +4276,14 @@ dpu_intf2_out: endpoint { remote-endpoint = <&mdss_dsi1_in>; }; }; + + port@2 { + reg = <2>; + + dpu_intf0_out: endpoint { + remote-endpoint = <&mdss_dp_in>; + }; + }; }; mdp_opp_table: opp-table { @@ -4297,6 +4311,85 @@ opp-460000000 { }; }; + mdss_dp: displayport-controller@ae90000 { + compatible = "qcom,sm8250-dp", "qcom,sm8350-dp"; + reg = <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; + assigned-clock-parents = <&dp_phy 0>, + <&dp_phy 1>; + + phys = <&dp_phy>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&dp_opp_table>; + power-domains = <&rpmhpd SM8250_MMCX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_dp_in: endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dp_out: endpoint { + }; + }; + }; + + dp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + mdss_dsi0: dsi@ae94000 { compatible = "qcom,sm8250-dsi-ctrl", "qcom,mdss-dsi-ctrl";