From patchwork Fri Jul 28 21:33:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 707559 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0306C001DE for ; Fri, 28 Jul 2023 21:33:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232542AbjG1Vdm (ORCPT ); Fri, 28 Jul 2023 17:33:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234196AbjG1Vdj (ORCPT ); Fri, 28 Jul 2023 17:33:39 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C75D3C3C for ; Fri, 28 Jul 2023 14:33:25 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id 2adb3069b0e04-4fe216edaf7so1208922e87.0 for ; Fri, 28 Jul 2023 14:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1690580003; x=1691184803; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9zcAphDeKoBf44cILmkXzAz8LYKbM2dUINvXgyHkOno=; b=PzNH5JjcwsULrZmp1QgeVLoLKdpncwBMQEFDd8vytFritMAgt8s9df0B18Zf5B80uC 7asHgeKVEEd0NQZKV5cEtKpfXOTTPP0MnWGZrbgPSd77yhu2pO26FHsdI1a+MXXrBjn5 oAvfjPxyl31ziB7KFuOP4y60ebZW9TVAxNyeIvI4sTSd3dMBmS/aBA7Y6XFb/JA3JWCb YOldYi2vCYLajI1zRAT4MwNjSF90rC8c70+40rtbfMy1bM7SSSaGA8kmdnoB5OlLzG4Q dX3Bcu7ocJ1xlgnxbZwG/Bm3xvYoOFEc+l1a7o7yxr59BZM20oQsUhnPgdS8l3jK9DbQ RKuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690580003; x=1691184803; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9zcAphDeKoBf44cILmkXzAz8LYKbM2dUINvXgyHkOno=; b=N1c9yr0T1jTAhaU8u1wIJPSb/3C8IOP7/EtyRzCDflawL91QBV9LMam0A4fJhKHYum dDzW+A/RfO/ouxA5pGDHB8953GZ++//ZF5meXGGX7fnrM087M/rcxBfvwmTWX7yrfi7N CkM5dodWHPM5J8KjKMJSu+O2ci6tdUBjoqkmOPjAx1g2VNabRmEoZKhl7WMyvYnPpLQj dkAwqkXey3KN7uOe4N4G9FPcGoge8NgptnYNWUGET/bMiHFqzbQwj/4nQWBW8L+/5vsR jMWntYmsfBlK7m47uFX1a8jaH/hbIkNMKbICayC3hb5PyROkgsJcZUbtY0Jth25YJOpd kpAA== X-Gm-Message-State: ABy/qLYelnsrJiCAuNUwSDfxWt8CysMmqHQvPb+OG13U1lb46KKmIIej cz5ytL9NnZjeMgD9M7f0IOk0/Q== X-Google-Smtp-Source: APBJJlFTuKxTMRNFHRgf3sybkewhB/TD8XOUojhCxu29lMlmBvO4HvY0H6VtlEyeuLyHKNUA8hhauQ== X-Received: by 2002:ac2:5598:0:b0:4f8:6253:540 with SMTP id v24-20020ac25598000000b004f862530540mr1242553lfg.19.1690580003752; Fri, 28 Jul 2023 14:33:23 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n16-20020a056512389000b004fe13318aeesm956832lft.166.2023.07.28.14.33.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Jul 2023 14:33:23 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 1/7] drm/msm/mdss: correct UBWC programming for SM8550 Date: Sat, 29 Jul 2023 00:33:14 +0300 Message-Id: <20230728213320.97309-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230728213320.97309-1-dmitry.baryshkov@linaro.org> References: <20230728213320.97309-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The SM8550 platform employs newer UBWC decoder, which requires slightly different programming. Fixes: a2f33995c19d ("drm/msm: mdss: add support for SM8550") Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index bf68bae23264..e38929205134 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -189,6 +189,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss) #define UBWC_2_0 0x20000000 #define UBWC_3_0 0x30000000 #define UBWC_4_0 0x40000000 +#define UBWC_4_3 0x40030000 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss) { @@ -227,7 +228,10 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss) writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2); writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE); } else { - writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); + if (data->ubwc_dec_version == UBWC_4_3) + writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2); + else + writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE); } } @@ -271,6 +275,7 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) msm_mdss_setup_ubwc_dec_30(msm_mdss); break; case UBWC_4_0: + case UBWC_4_3: msm_mdss_setup_ubwc_dec_40(msm_mdss); break; default: @@ -576,6 +581,16 @@ static const struct msm_mdss_data sm8250_data = { .macrotile_mode = 1, }; +static const struct msm_mdss_data sm8550_data = { + .ubwc_version = UBWC_4_0, + .ubwc_dec_version = UBWC_4_3, + .ubwc_swizzle = 6, + .ubwc_static = 1, + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ + .highest_bank_bit = 3, + .macrotile_mode = 1, +}; + static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,mdss" }, { .compatible = "qcom,msm8998-mdss" }, @@ -593,7 +608,7 @@ static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8450-mdss", .data = &sm8250_data }, - { .compatible = "qcom,sm8550-mdss", .data = &sm8250_data }, + { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, {} }; MODULE_DEVICE_TABLE(of, mdss_dt_match);