From patchwork Thu Aug 3 10:57:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imran Shaik X-Patchwork-Id: 710981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96353C41513 for ; Thu, 3 Aug 2023 10:59:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235505AbjHCK7R (ORCPT ); Thu, 3 Aug 2023 06:59:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235503AbjHCK6x (ORCPT ); Thu, 3 Aug 2023 06:58:53 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDB6A3C3E; Thu, 3 Aug 2023 03:58:40 -0700 (PDT) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 373AH7rm015672; Thu, 3 Aug 2023 10:58:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=Nt4C0mVR+ky0DpSB8k45/C39Em/flWndJ3l9xoOdKaA=; b=ZreTtSBsKN/rUsPZgmn2rJ6xksqj3HZWIMduIaBtWeUDtNZ3V0ZTVIHp4nVgtEzbLuJp rrsuCKpwW3pNHyVQDpD3rdJ5vv8KEpg7pp29f+BEd9oxksWCRjv20Acxn9RIPeop+yOt 8VN/1qsIdFBYLyhttkZbp8023+zPS4G2rIFHwpyxcrSNUiT/iS04gMgAgDfUbMqBytac vQYivlth8QQpHqqRBvAmYQxmO97aXmsb4Ef3yA2l8LIG1o/jPx7aF2WLGOSzsmhqLoNz eMlJAxugTnXo/9cRZ33G0eom8U+TKQQRytwgxpqpl9fqhysPeGsD/GOzdVvgBfT6Wf1H lw== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3s82wx8vkr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 03 Aug 2023 10:58:36 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 373AwZ0J009585 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 3 Aug 2023 10:58:35 GMT Received: from hu-imrashai-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Thu, 3 Aug 2023 03:58:30 -0700 From: Imran Shaik To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Taniya Das , Imran Shaik , Dmitry Baryshkov , Melody Olvera , , , , , Jagadeesh Kona , "Ajit Pandey" , Satya Priya Kakitapalli Subject: [PATCH V5 4/8] clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock Date: Thu, 3 Aug 2023 16:27:37 +0530 Message-ID: <20230803105741.2292309-5-quic_imrashai@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230803105741.2292309-1-quic_imrashai@quicinc.com> References: <20230803105741.2292309-1-quic_imrashai@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: PYq9lq9O5uXTSqLEFDK3_cZnOUk847A2 X-Proofpoint-GUID: PYq9lq9O5uXTSqLEFDK3_cZnOUk847A2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-03_09,2023-08-03_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=999 phishscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308030098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org gcc_gpll1_out_even clock is referenced as a parent, but not registered with the clock framework. Hence add support to register the same. Fixes: 1c9efb0bc040 ("clk: qcom: Add QDU1000 and QRU1000 GCC support") Signed-off-by: Imran Shaik --- Changes since v4: - Split the gcc_ddrss_ecpri_gsi_clk clock changes - Update the commit text Changes since v3: - None Changes since v2: - Split the patch as per the review comments - Newly added drivers/clk/qcom/gcc-qdu1000.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/gcc-qdu1000.c b/drivers/clk/qcom/gcc-qdu1000.c index 6a6e0f55516a..97fd1947637a 100644 --- a/drivers/clk/qcom/gcc-qdu1000.c +++ b/drivers/clk/qcom/gcc-qdu1000.c @@ -2522,6 +2522,7 @@ static struct clk_regmap *gcc_qdu1000_clocks[] = { [GCC_AGGRE_NOC_ECPRI_GSI_CLK] = &gcc_aggre_noc_ecpri_gsi_clk.clkr, [GCC_PCIE_0_PHY_AUX_CLK_SRC] = &gcc_pcie_0_phy_aux_clk_src.clkr, [GCC_PCIE_0_PIPE_CLK_SRC] = &gcc_pcie_0_pipe_clk_src.clkr, + [GCC_GPLL1_OUT_EVEN] = &gcc_gpll1_out_even.clkr, }; static const struct qcom_reset_map gcc_qdu1000_resets[] = {