From patchwork Mon Sep 4 02:04:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 720027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBE49C83F3E for ; Mon, 4 Sep 2023 02:05:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350516AbjIDCFE (ORCPT ); Sun, 3 Sep 2023 22:05:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350357AbjIDCFD (ORCPT ); Sun, 3 Sep 2023 22:05:03 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BED3510E for ; Sun, 3 Sep 2023 19:04:59 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id 38308e7fff4ca-2bce552508fso13624821fa.1 for ; Sun, 03 Sep 2023 19:04:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1693793098; x=1694397898; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HLNzq9clNx/uWlRBBWtOxyDc+fCrCWWRwY8KEgjzC9M=; b=hyAyAoMH0y81l0GyWLVjsKEGiIdwAmszm/W6gKcmPOe2C7sc0TupgnRKS+VRMTkgjv 3yMXFwu6QXOl2PjY0QSEpkerdnv1pKeaBcDROCJaApYI0+sEC5x1W27KO9x15HmrizUk sXLKmY0a5cCcF8S6zgFUSB3GqqE6zPsTVFYws7QU2N9nSHdCnHsi3Bq116XFUY7W6tXL QpB8fcnW01SHE5o1KAe/pDE12nYlStZzyht+00JGEJxb0KcpnG+ikAKkPCXE3NiOuUJg QbhH4QPk75jiqeyfZ68kA3dI629Kg/nVQOtb1Dhh2CTyJuhYI5IdyA4KYr1SUyKJsVF6 aydA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693793098; x=1694397898; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HLNzq9clNx/uWlRBBWtOxyDc+fCrCWWRwY8KEgjzC9M=; b=iQYHqd5e23RHXsm5lsHV0hpolLLHNzMpRA5yiOKHjuPBih55EQdF2+SdWzXD0BfywJ ONbxkQkurz9C/qcp16vtYAF8QfPDFwun2ExZz7kq2qTAW1EBvnUV1lMVC7CxCgaBUVCi v4ct5IxUC3F0pyUEkhEvY1zCd4YIeOK34eFAQ6PDOWgNazksB1oTXVDcZwfTOxX73aTL zADbaoZm+kV9yueaZRKL2PpDrJ1u7o9gGzolkvFl5pcsRGJnrCk4En3D7Lo16TAgkP/W 1H94dEl6tzqqHKyF0VCUvvT+hTc3e+vLsSbHtOk2B+Z84ggDTqT75vxiGjPA6JVVYPpu YrvA== X-Gm-Message-State: AOJu0YxD/R2gyd81CxeZJ+IxrAuNGfDuDpJPCJF01ohZhS0HINXVldDz LWWPskgGJL7EBddxnKWu/7O9ow== X-Google-Smtp-Source: AGHT+IHkP8rfTayfHBwa0bIcxjuTohbwnOzqzgyIf2VEXTPMbpq5YLcCHqaSTmXhyMoMwzHfZPcdvQ== X-Received: by 2002:a2e:9b94:0:b0:2b1:ed29:7c47 with SMTP id z20-20020a2e9b94000000b002b1ed297c47mr5810171lji.8.1693793098183; Sun, 03 Sep 2023 19:04:58 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id t13-20020a2e9c4d000000b002bce0e9385asm1818237ljj.9.2023.09.03.19.04.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Sep 2023 19:04:57 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v3 4/8] drm/msm/dpu: inline _setup_intf_ops() Date: Mon, 4 Sep 2023 05:04:50 +0300 Message-Id: <20230904020454.2945667-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230904020454.2945667-1-dmitry.baryshkov@linaro.org> References: <20230904020454.2945667-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Inline the _setup_intf_ops() function, it makes it easier to handle different conditions involving INTF configuration. Reviewed-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 48 ++++++++++----------- 1 file changed, 22 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index 8ec6505d9e78..dd67686f5403 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -524,31 +524,6 @@ static void dpu_hw_intf_program_intf_cmd_cfg(struct dpu_hw_intf *ctx, DPU_REG_WRITE(&ctx->hw, INTF_CONFIG2, intf_cfg2); } -static void _setup_intf_ops(struct dpu_hw_intf_ops *ops, - unsigned long cap, const struct dpu_mdss_version *mdss_rev) -{ - ops->setup_timing_gen = dpu_hw_intf_setup_timing_engine; - ops->setup_prg_fetch = dpu_hw_intf_setup_prg_fetch; - ops->get_status = dpu_hw_intf_get_status; - ops->enable_timing = dpu_hw_intf_enable_timing_engine; - ops->get_line_count = dpu_hw_intf_get_line_count; - if (cap & BIT(DPU_INTF_INPUT_CTRL)) - ops->bind_pingpong_blk = dpu_hw_intf_bind_pingpong_blk; - ops->setup_misr = dpu_hw_intf_setup_misr; - ops->collect_misr = dpu_hw_intf_collect_misr; - - if (cap & BIT(DPU_INTF_TE)) { - ops->enable_tearcheck = dpu_hw_intf_enable_te; - ops->disable_tearcheck = dpu_hw_intf_disable_te; - ops->connect_external_te = dpu_hw_intf_connect_external_te; - ops->vsync_sel = dpu_hw_intf_vsync_sel; - ops->disable_autorefresh = dpu_hw_intf_disable_autorefresh; - } - - if (mdss_rev->core_major_ver >= 7) - ops->program_intf_cmd_cfg = dpu_hw_intf_program_intf_cmd_cfg; -} - struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg, void __iomem *addr, const struct dpu_mdss_version *mdss_rev) { @@ -571,7 +546,28 @@ struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg, */ c->idx = cfg->id; c->cap = cfg; - _setup_intf_ops(&c->ops, c->cap->features, mdss_rev); + + c->ops.setup_timing_gen = dpu_hw_intf_setup_timing_engine; + c->ops.setup_prg_fetch = dpu_hw_intf_setup_prg_fetch; + c->ops.get_status = dpu_hw_intf_get_status; + c->ops.enable_timing = dpu_hw_intf_enable_timing_engine; + c->ops.get_line_count = dpu_hw_intf_get_line_count; + c->ops.setup_misr = dpu_hw_intf_setup_misr; + c->ops.collect_misr = dpu_hw_intf_collect_misr; + + if (cfg->features & BIT(DPU_INTF_INPUT_CTRL)) + c->ops.bind_pingpong_blk = dpu_hw_intf_bind_pingpong_blk; + + if (cfg->features & BIT(DPU_INTF_TE)) { + c->ops.enable_tearcheck = dpu_hw_intf_enable_te; + c->ops.disable_tearcheck = dpu_hw_intf_disable_te; + c->ops.connect_external_te = dpu_hw_intf_connect_external_te; + c->ops.vsync_sel = dpu_hw_intf_vsync_sel; + c->ops.disable_autorefresh = dpu_hw_intf_disable_autorefresh; + } + + if (mdss_rev->core_major_ver >= 7) + c->ops.program_intf_cmd_cfg = dpu_hw_intf_program_intf_cmd_cfg; return c; }