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Tue, 30 Jan 2024 23:09:12 -0800 (PST) Received: from [127.0.1.1] ([103.28.246.26]) by smtp.gmail.com with ESMTPSA id lp17-20020a056a003d5100b006ddd182bf1csm9087956pfb.46.2024.01.30.23.09.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 23:09:12 -0800 (PST) From: Manivannan Sadhasivam Date: Wed, 31 Jan 2024 12:37:36 +0530 Subject: [PATCH v3 13/17] arm64: dts: qcom: sc8180x: Fix UFS PHY clocks Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240131-ufs-phy-clock-v3-13-58a49d2f4605@linaro.org> References: <20240131-ufs-phy-clock-v3-0-58a49d2f4605@linaro.org> In-Reply-To: <20240131-ufs-phy-clock-v3-0-58a49d2f4605@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, quic_cang@quicinc.com, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1123; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=wK5tqh64wjjHKC01oRXS3I38BrjvpCIIBSIYFkTgDwo=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBlufG+pb5oFirLIkRag4f9F9BpfPO1+LpFuO1p3 PRwRvgLcHWJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZbnxvgAKCRBVnxHm/pHO 9Tm5B/4iM2TOXXMQNHax1JAPT4o8H7oYOeV1YgRiWZyzGV2NzMJlegipoZaFPuAjiwEFJxwcF01 xpsD5b6ca2EAiKbyINLFqLylGn27COU+9eNgmCN3covcFXrIyj5vNQWDo0XR5cpYXyCUwgyb7Ga X7gGWVQkBHvwZ01KeE68ZD95y4biicfoqc5yzPsrTcMH0R173tTvIMKCZQddJEDuyOg9+JaVtUD VA4KYJf6lke9GJpG7VI09J4Xs4qwJCmJhsUZjubKUfwal7Nfo+WX4Vo64u3XY1NnnY7CtoR9/fk +6SNY00kwnwqS4EmK5TY8UbjWOGb7ZwzjDZL9gLAUnlRPcot X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 QMP PHY used in SC8180X requires 3 clocks: * ref - 19.2MHz reference clock from RPMh * ref_aux - Auxiliary reference clock from GCC * qref - QREF clock from GCC Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index c64625619a65..45d39762fb27 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2140,9 +2140,11 @@ ufs_mem_phy: phy-wrapper@1d87000 { reg = <0 0x01d87000 0 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&gcc GCC_UFS_MEM_CLKREF_EN>; clock-names = "ref", - "ref_aux"; + "ref_aux", + "qref"; resets = <&ufs_mem_hc 0>; reset-names = "ufsphy";