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Fri, 14 Jun 2024 03:18:28 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ec05bf44c4sm5000241fa.9.2024.06.14.03.18.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jun 2024 03:18:28 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 14 Jun 2024 13:18:26 +0300 Subject: [PATCH v3 3/5] arm64: dts: qcom: sm8450: drop second clock name from clock-output-names Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240614-fix-pcie-phy-compat-v3-3-730d1811acf4@linaro.org> References: <20240614-fix-pcie-phy-compat-v3-0-730d1811acf4@linaro.org> In-Reply-To: <20240614-fix-pcie-phy-compat-v3-0-730d1811acf4@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1000; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=I093xTrSybfnOucPVkUB5qR7/j0+qKZEXXwZD3HnmRI=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmbBjx+BrBaGMaaPRDhS7jLrNy1Rtar2xIcCN2z msnF3D1TV2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZmwY8QAKCRCLPIo+Aiko 1W6vB/4ucABTtla15D+BBWE9tmORhfqnB46o6atREi46/FGipL1s0qcH4paXOk3a6cY/7FOzscm YvUHltJ6hJ0RV8Bky/IHSilPZ9kqMMXDMaVmossRDttbBwmhmW/Ad1OVrF5J7h/EJ8k9W4UgdD+ MshRl9IrqD5zGRoUa2fHB+6CaXpuICZE3C/4J9fAo5bo+1vZbXJ8oxVUmJwEXimCMTl4ZmQvWIX dyU9NyxD7iflpfEma92EuWmnNEtWvznU8dwGgl8j2zxSysqZ6VhSrel2CIm/mdeZnJMw+0PvM95 3E33ce7fjovm+Y3hIPllA5hx9Asd/wbcrmXqLR8jpuiSn/rs X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to specify exact name for the second (AUX) output clock. It has never been used for the lookups based on the system clock name. The driver generates it on its own, in order to remain compatible with the older DT. Drop the clock name. Fixes: e76862840660 ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc") Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1e762cc8085a..9bafb3b350ff 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2087,7 +2087,7 @@ pcie1_phy: phy@1c0e000 { "rchng", "pipe"; - clock-output-names = "pcie_1_pipe_clk", "pcie_1_phy_aux_clk"; + clock-output-names = "pcie_1_pipe_clk"; #clock-cells = <1>; #phy-cells = <0>;