diff mbox series

[v5,5/8] clk: qcom: ipq5332: Add couple of more interconnects

Message ID 20240829082830.56959-6-quic_varada@quicinc.com
State New
Headers show
Series Add NSS clock controller support for Qualcomm IPQ5332 | expand

Commit Message

Varadarajan Narayanan Aug. 29, 2024, 8:28 a.m. UTC 
Update the GCC master/slave list to include couple of
more interfaces needed by the Network Subsystem Clock
Controller (NSSCC)

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
 drivers/clk/qcom/gcc-ipq5332.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
index c3020106dcf8..fadddf30e320 100644
--- a/drivers/clk/qcom/gcc-ipq5332.c
+++ b/drivers/clk/qcom/gcc-ipq5332.c
@@ -3650,6 +3650,8 @@  static struct qcom_icc_hws_data icc_ipq5332_hws[] = {
 	{ MASTER_NSSNOC_QOSGEN_REF, SLAVE_NSSNOC_QOSGEN_REF, GCC_NSSNOC_QOSGEN_REF_CLK },
 	{ MASTER_NSSNOC_TIMEOUT_REF, SLAVE_NSSNOC_TIMEOUT_REF, GCC_NSSNOC_TIMEOUT_REF_CLK },
 	{ MASTER_NSSNOC_XO_DCD, SLAVE_NSSNOC_XO_DCD, GCC_NSSNOC_XO_DCD_CLK },
+	{ MASTER_SNOC_NSSNOC_1_CLK, SLAVE_SNOC_NSSNOC_1_CLK, GCC_SNOC_NSSNOC_1_CLK },
+	{ MASTER_SNOC_NSSNOC_CLK, SLAVE_SNOC_NSSNOC_CLK, GCC_SNOC_NSSNOC_CLK },
 };
 
 static const struct regmap_config gcc_ipq5332_regmap_config = {