From patchwork Tue Oct 22 10:26:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 838194 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 820EF19ABD1 for ; Tue, 22 Oct 2024 10:27:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729592840; cv=none; b=DRAPlNja4GRhJvQvN9dZOO1pqiCwmDrTyw1ayzfYdoAv7sSLnuKHSRJM1FoajwSywfIJTNABCRmrpiEeMyozKuqSxWR7nzz1UE2Fg+mKcpUdqAljy6SNCbmly9B9f3Js16eSl05bJ+DBGyt3abx8e1CXtxkJeIJp9EKrA9lD0YE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729592840; c=relaxed/simple; bh=xuTURflIghGRLgyG1fByzlO19gUXaXG+FonMytFjuyM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Lnx5aBuK/poPdNmyxKEVmnIW/W3NeszweNSZ5hMucGPfrJIRyJvAJWoBwYevoG+7iphQj88//bG6px01yRFQAYSui4R5wz27BskT8jMia3HnQMpAfre/ZUccQ7R1+7Bvrp7qlSFJ9Y9AXQ+1yMASeniKoT+JdPlzXF0bEQ0jeQo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=huGmLmR0; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="huGmLmR0" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-43158625112so53641555e9.3 for ; Tue, 22 Oct 2024 03:27:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729592836; x=1730197636; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=dMowVYQpXe9yPqY3Gd4YJd2LhlIkutlScCrrmvOLANs=; b=huGmLmR0B3VVR7YKn3SHmT0i3Lqtbn6iKtq3zlybuyOB8ZsLU5607hRbjN7Hf9PeP8 usdnxVYTdGHGBTGeKRvNSyFYDRrAhtOZEOjXO8E6i4bj7eUPVqA+zm2DEaAjyRbX8zVJ Q7ohY8FcFgCobNHG4RqDypFuc1xUrTUQ28zq94e5fTBNc6p99fL2CFHDi+1JGOEdBkKs 8OIFOWy/7f3nnkMpPGt7SLneARvoBRreX9stVGZFr03bkioEDcn3UG3nXVAdZY/nzrWT CdDHzpWBCvcsJsr+7Oc6GNanE4w+mlELHzdtB7mSgCnQAkEeL7EtsPWBC1lwKDz3Ry9P hH5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729592836; x=1730197636; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dMowVYQpXe9yPqY3Gd4YJd2LhlIkutlScCrrmvOLANs=; b=RfnKpX4mEYwBqQYwqV1xsWONMLfJQTulHbPGGnVkvSqOWm2V/w2fU+t+ZG6IODIckK YwroIXiUbU2BfPcTAG0wXn90Sz1QXt9/8PPtorrxjLuvXCAkkD+owCVctlNlz+5AqfsB +rio5YKs+B1zqI0Zr6wYa0XRjGK7+rzVZFpU/kiEzXig59o3pVCKd0t75PgvUSpiauKj dzK5M2LKdOh1Xl2UP50IiQFJ/pXoiLlklfZguIJoEmVP9YSpVksNLBB9DAQzaO26+tFL nln8u19xp45/Zy1qy0nta51llGvImqSdekjRLImv0EHTXXXQlu3V2WhQlpNrnXO86jaR eLzQ== X-Gm-Message-State: AOJu0YybhX+wQnXxDVOryt1p0/CONzzEa6WQROKAq/lnhYLkJGD0MN4F 0MSlOwlEkVQQ37BqFYzxakHlt6yLaGWyDxpd7nPimcGDK3N5E3Qu2GQrl34eWls0SHqxQB7ge7J 5 X-Google-Smtp-Source: AGHT+IEIBjtNttWVJwkuwmos9pIepiBRbnVt9BaE8twfi3auiaE8qlY7ad4fJP7WbIF2ROCZqIeL0w== X-Received: by 2002:a5d:46c1:0:b0:37d:39c8:ecca with SMTP id ffacd0b85a97d-37eab6ec1a0mr8366253f8f.55.1729592836393; Tue, 22 Oct 2024 03:27:16 -0700 (PDT) Received: from [127.0.1.1] ([82.76.168.176]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ee0b94048sm6285184f8f.85.2024.10.22.03.27.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 03:27:16 -0700 (PDT) From: Abel Vesa Date: Tue, 22 Oct 2024 13:26:56 +0300 Subject: [PATCH v3 3/4] arm64: dts: qcom: x1e80100-crd: Add Parade PS8830 related nodes Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241022-x1e80100-ps8830-v3-3-68a95f351e99@linaro.org> References: <20241022-x1e80100-ps8830-v3-0-68a95f351e99@linaro.org> In-Reply-To: <20241022-x1e80100-ps8830-v3-0-68a95f351e99@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Rajendra Nayak , Sibi Sankar , Johan Hovold , Dmitry Baryshkov , Trilok Soni , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; a=openpgp-sha256; l=11777; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=xuTURflIghGRLgyG1fByzlO19gUXaXG+FonMytFjuyM=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBnF338bgKwU/mq+9Ty1Ta9ZwhE6qFnpFrDkNEcs kWqHf+eCKWJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZxd9/AAKCRAbX0TJAJUV Vgn3D/90W32L79grzbLrkPp9uu0p1udGXebQ+V4BMWGAj4UQ6q2vZX32lhYq0b9jOz2jHFzkrPR 8ngpq7tdYF/RZK5xAg88qbM7LJQcOVQR7jnJLeHwLC7wUwqe5RNlr9p4mpwlhLvKEKY58oZmp/n WrzYLOK+QEhSpB1jQY/pMzBmi2seiX9luBe8TJHf+Bq5RiZs6QBGbrDD4lpfsHSz18gq48AxjKe mMCMUd3NeOtWy2g91TtLagRv7+fAt+XGvyNLNJ2o0XraWCgwFabiVEnU1ywccv7dale7s83ZQnQ PDwnIqu7kAdC1r6GncdHe9APAQAUld8HOej2FXIN6WAcDN3p52b/QnJrO4593Wkp6Yd1n0Kfrbi 6t2n/rE94b7XhAub6miaSqcHUeJwunJKX2pdZSIpYdMHxB8bnd//sB344faRcuhH07AjwlH/cIo 3XprnpQ+WLBsMU+kEI/HSxcZal6j9rRJ6WHN4SUlqubJC4sNj39lYQiLa0b4PKsVPIddnfRNUnK acZdY0pyN3GpTRrkfGcGDmw4vxWMnJCA0P2ess0ROgzhABWCeipm2ADlHCDRZQiPqn22+KMEYY+ rDEdjSYC5lwcRrXYtPLBM7V+ppb6RUos9L/DR1/xM2pXqoMTeyoMDwNol4swFOKpipuMVDYUwYD wXZuTtzum7sLsZQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Add nodes for all 3 Parade PS8830 Type-C retimers found on Qualcomm X Elite CRD board, along with all of their voltage regulators. These retimers sit between the Type-C connectors and the PHYs, so describe the pmic glink graph accordingly. On this board, these retimers might be left enabled and configured by the bootloader, so make sure the retimers don't reset their configuration on driver probe. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 448 +++++++++++++++++++++++++++++- 1 file changed, 442 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index f5f2659690915f9ba50d15a27c54e3c0f504a14b..7cc45a5cd7eb7e70915d04ea7e181b56f693f768 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -99,7 +99,15 @@ port@1 { reg = <1>; pmic_glink_ss0_ss_in: endpoint { - remote-endpoint = <&usb_1_ss0_qmpphy_out>; + remote-endpoint = <&retimer_ss0_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss0_con_sbu_out>; }; }; }; @@ -128,7 +136,15 @@ port@1 { reg = <1>; pmic_glink_ss1_ss_in: endpoint { - remote-endpoint = <&usb_1_ss1_qmpphy_out>; + remote-endpoint = <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss1_con_sbu_out>; }; }; }; @@ -157,7 +173,15 @@ port@1 { reg = <1>; pmic_glink_ss2_ss_in: endpoint { - remote-endpoint = <&usb_1_ss2_qmpphy_out>; + remote-endpoint = <&retimer_ss2_ss_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_ss2_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss2_con_sbu_out>; }; }; }; @@ -291,6 +315,150 @@ vreg_nvme: regulator-nvme { pinctrl-0 = <&nvme_reg_en>; }; + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_1p15_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_1p8_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR0_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr0_3p3_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr1_1p15_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr1_1p8_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR1_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr1_3p3_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR2_1P15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + + gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr2_1p15_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR2_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr2_1p8_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_RTMR2_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&rtmr2_3p3_reg_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; + vph_pwr: regulator-vph-pwr { compatible = "regulator-fixed"; @@ -709,6 +877,187 @@ keyboard@3a { }; }; +&i2c1 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x08>; + + clocks = <&rpmhcc RPMH_RF_CLK5>; + clock-names = "xo"; + + vdd-supply = <&vreg_rtmr2_1p15>; + vdd33-supply = <&vreg_rtmr2_3p3>; + vdd33-cap-supply = <&vreg_rtmr2_3p3>; + vddar-supply = <&vreg_rtmr2_1p15>; + vddat-supply = <&vreg_rtmr2_1p15>; + vddio-supply = <&vreg_rtmr2_1p8>; + + reset-gpios = <&tlmm 185 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&rtmr2_default>; + pinctrl-names = "default"; + + orientation-switch; + retimer-switch; + + ps8830,boot-on; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss2_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss2_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss2_ss_in: endpoint { + remote-endpoint = <&usb_1_ss2_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss2_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss2_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c3 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x08>; + + clocks = <&rpmhcc RPMH_RF_CLK3>; + clock-names = "xo"; + + vdd-supply = <&vreg_rtmr0_1p15>; + vdd33-supply = <&vreg_rtmr0_3p3>; + vdd33-cap-supply = <&vreg_rtmr0_3p3>; + vddar-supply = <&vreg_rtmr0_1p15>; + vddat-supply = <&vreg_rtmr0_1p15>; + vddio-supply = <&vreg_rtmr0_1p8>; + + reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&rtmr0_default>; + pinctrl-names = "default"; + + retimer-switch; + orientation-switch; + + ps8830,boot-on; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint = <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c7 { + clock-frequency = <400000>; + + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x8>; + + clocks = <&rpmhcc RPMH_RF_CLK4>; + clock-names = "xo"; + + vdd-supply = <&vreg_rtmr1_1p15>; + vdd33-supply = <&vreg_rtmr1_3p3>; + vdd33-cap-supply = <&vreg_rtmr1_3p3>; + vddar-supply = <&vreg_rtmr1_1p15>; + vddat-supply = <&vreg_rtmr1_1p15>; + vddio-supply = <&vreg_rtmr1_1p8>; + + reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&rtmr1_default>; + pinctrl-names = "default"; + + retimer-switch; + orientation-switch; + + ps8830,boot-on; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint = <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; + }; + }; + + }; + }; +}; + &i2c8 { clock-frequency = <400000>; @@ -854,6 +1203,37 @@ &pcie6a_phy { status = "okay"; }; +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins = "gpio10"; + function = "normal"; + power-source = <1>; /* 1.8V */ + }; + + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { + pins = "gpio11"; + function = "normal"; + power-source = <1>; /* 1.8V */ + }; +}; + +&pmc8380_5_gpios { + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { + pins = "gpio8"; + function = "normal"; + power-source = <1>; /* 1.8V */ + bias-disable; + }; +}; + +&pm8550ve_9_gpios { + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { + pins = "gpio8"; + function = "normal"; + power-source = <1>; /* 1.8V */ + }; +}; + &pmc8380_3_gpios { edp_bl_en: edp-bl-en-state { pins = "gpio4"; @@ -1093,6 +1473,62 @@ wake-n-pins { }; }; + rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { + pins = "gpio188"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { + pins = "gpio175"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { + pins = "gpio186"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr1_default: rtmr1-reset-n-active-state { + pins = "gpio176"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state { + pins = "gpio189"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state { + pins = "gpio126"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state { + pins = "gpio187"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + rtmr2_default: rtmr2-reset-n-active-state { + pins = "gpio185"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + tpad_default: tpad-default-state { pins = "gpio3"; function = "gpio"; @@ -1160,7 +1596,7 @@ &usb_1_ss0_dwc3_hs { }; &usb_1_ss0_qmpphy_out { - remote-endpoint = <&pmic_glink_ss0_ss_in>; + remote-endpoint = <&retimer_ss0_ss_in>; }; &usb_1_ss1_hsphy { @@ -1188,7 +1624,7 @@ &usb_1_ss1_dwc3_hs { }; &usb_1_ss1_qmpphy_out { - remote-endpoint = <&pmic_glink_ss1_ss_in>; + remote-endpoint = <&retimer_ss1_ss_in>; }; &usb_1_ss2_hsphy { @@ -1216,5 +1652,5 @@ &usb_1_ss2_dwc3_hs { }; &usb_1_ss2_qmpphy_out { - remote-endpoint = <&pmic_glink_ss2_ss_in>; + remote-endpoint = <&retimer_ss2_ss_in>; };