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AJvYcCU3OzR4ioCjookdkB0FDkR3MXR78ukF9bcpQVOtr3PXadvSSHg/ztpmEid/guhj45fztB+qsvQAWGxA6WjI@vger.kernel.org X-Gm-Message-State: AOJu0YxgDXxam1BTryDp6R9pimzYaUelZdbzg6PKKFbnwErDaSdVGGsh orPy6ubYAZPxIJ2oAFx/cxggRoQadRCFMxp1+CbKN5In5ogLgko8xGfDtvezJjQ= X-Google-Smtp-Source: AGHT+IENmFZ2CH0DtPNo/eS9oAo1+rJXuWpBueUsCl0BOJBXfwA7xhWdqjWkh69ceSQdQ5+HnDh0+g== X-Received: by 2002:a5d:5847:0:b0:37d:4d3f:51e9 with SMTP id ffacd0b85a97d-381c7aa451dmr1773039f8f.40.1730439119587; Thu, 31 Oct 2024 22:31:59 -0700 (PDT) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4327d6852fdsm46960505e9.34.2024.10.31.22.31.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Oct 2024 22:31:59 -0700 (PDT) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 02/10] arm64: dts: qcom: sm4250: add description of soundwire pins Date: Fri, 1 Nov 2024 05:31:46 +0000 Message-ID: <20241101053154.497550-3-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101053154.497550-1-alexey.klimov@linaro.org> References: <20241101053154.497550-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Adds data and clock pins description (their active state) of soundwire masters. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm4250.dtsi | 46 ++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi index 1b9983ab122e..8873015c05b9 100644 --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -37,6 +37,16 @@ &cpu7 { compatible = "qcom,kryo240"; }; +&swr0 { + pinctrl-0 = <&lpass_tx_swr_active>; + pinctrl-names = "default"; +}; + +&swr1 { + pinctrl-0 = <&lpass_rx_swr_active>; + pinctrl-names = "default"; +}; + &lpass_tlmm { compatible = "qcom,sm4250-lpass-lpi-pinctrl"; gpio-ranges = <&lpass_tlmm 0 0 26>; @@ -74,4 +84,40 @@ ext-mclk1-pins { output-high; }; }; + + lpass_tx_swr_active: lpass-tx-swr-active-state { + clk-pins { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <10>; + slew-rate = <3>; + bias-disable; + }; + + data-pins { + pins = "gpio1", "gpio2"; + function = "swr_tx_data"; + drive-strength = <10>; + slew-rate = <3>; + bias-bus-hold; + }; + }; + + lpass_rx_swr_active: lpass-rx-swr-active-state { + clk-pins { + pins = "gpio3"; + function = "swr_rx_clk"; + drive-strength = <10>; + slew-rate = <3>; + bias-disable; + }; + + data-pins { + pins = "gpio4", "gpio5"; + function = "swr_rx_data"; + drive-strength = <10>; + slew-rate = <3>; + bias-bus-hold; + }; + }; };