From patchwork Fri Dec 6 04:31:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhinav Kumar X-Patchwork-Id: 848173 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 627F113DDAE; Fri, 6 Dec 2024 04:33:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733459588; cv=none; b=IPVNKXRAWuGMaSfJdHEXq/FyfnQwRzE8auj6UGt2zJS3AWwUKvjkl0CN7W4dtN3DMmern57BOHauHN9p2NUXgcOwBObRCtqcq7vzs71kvM9dadS967gzasOlLbj7LUzBgKAQ4tJMbc5Vpr1+5s7rcBDzLmybDHuGbnwQ09jwKOI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733459588; c=relaxed/simple; bh=HvU8ieFt/hI/fEje4LFS/cP6jsBHZg15RdzK1YmGaEo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=AxHKhHAVhDzVG4Edpz5T5k8coHJDn0GEeap7d9N7iddoDEPal+vE9Z9xAowjB/ZHZW9BKnIyK2zWMtJ6VAxmqO8z62kTYwBQe0FR5V/0Wr1CB/heqPoirfYbNr9/F6BB1gV3dEMRRBBjEcMu3zD0uwY4CWObWkFi3urZgbhm694= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=NjEkIeG9; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="NjEkIeG9" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B5HaNNU004665; Fri, 6 Dec 2024 04:32:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= fJt8SBdtjUT7GaSvBuWYIjlho4MPPLaHNX8e0b88y6k=; b=NjEkIeG95OFb0de9 CehhUZG0zG+xZoQiDm9u//NmvPhJrgkHs6mPHPzCIrLY7V5Pow0hr+P/xESvK7cE IRqu2BTJbJG86nKYxpRxWHJIpgvFAgBf5ClPmhNkjtx8SfzTbqDeD+9cwzbYyOxi 1Pnw86vi885YcaKPa1XLly1ZLTX3l+Q1Vr7Pq5qk6TxBY4HLvSWuYE6s5HZoAAca SDs7OIsdYy6XiGaTEEBW9jfOjm8JSwvQ5O0hqJxJQNL9+AFoTQ0CiUEFut4FhtSj 8XGz5O/4T32m8Tsy2anmQNnLCAk+lELj6i1jLRDUqbzR2QJtK+GCN+mmyxIajhN3 1F9tzg== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43ba142k7b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 06 Dec 2024 04:32:29 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B64WRdC017189 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 6 Dec 2024 04:32:27 GMT Received: from abhinavk-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 5 Dec 2024 20:32:27 -0800 From: Abhinav Kumar Date: Thu, 5 Dec 2024 20:31:37 -0800 Subject: [PATCH 06/45] drm/msm/dp: remove dp_display's dp_mode and use dp_panel's instead Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241205-dp_mst-v1-6-f8618d42a99a@quicinc.com> References: <20241205-dp_mst-v1-0-f8618d42a99a@quicinc.com> In-Reply-To: <20241205-dp_mst-v1-0-f8618d42a99a@quicinc.com> To: Rob Clark , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" , Stephen Boyd , "Chandan Uddaraju" , Guenter Roeck , Kuogee Hsieh , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Vara Reddy , Rob Clark , Tanmay Shah , , , , , , Jessica Zhang , Laurent Pinchart , Abhinav Kumar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1733459543; l=4707; i=quic_abhinavk@quicinc.com; s=20240509; h=from:subject:message-id; bh=HvU8ieFt/hI/fEje4LFS/cP6jsBHZg15RdzK1YmGaEo=; b=Pz3z5E4XUkJSoSF4lKcr0tsZaBEpvYiehXHL3fcPkS4uRAltYToFwb++Sp9yEaQs1GiILKurd 4yBRiwb1LLbAwhoLVawlBt/5yba+O970itukjVTkpkoT+p15m0Pkdfe X-Developer-Key: i=quic_abhinavk@quicinc.com; a=ed25519; pk=SD3D8dOKDDh6BoX3jEYjsHrTFwuIK8+o0cLPgQok9ys= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eRUAKKasdK08N5VpcBDIwV6MDfASLpu9 X-Proofpoint-ORIG-GUID: eRUAKKasdK08N5VpcBDIwV6MDfASLpu9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 phishscore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412060030 dp_display caches the current display mode and then passes it onto the panel to be used for programming the panel params. Remove this two level passing and directly populated the panel's dp_display_mode instead. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/dp/dp_display.c | 46 ++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 052db80c6a365f53c2c0a37d3b69ea2b627aea1f..4bd85ae754429333aa423c985368344cd03c7752 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -90,7 +90,6 @@ struct msm_dp_display_private { struct msm_dp_panel *panel; struct msm_dp_ctrl *ctrl; - struct msm_dp_display_mode msm_dp_mode; struct msm_dp msm_dp_display; /* wait for audio signaling */ @@ -1436,10 +1435,13 @@ bool msm_dp_needs_periph_flush(const struct msm_dp *msm_dp_display, bool msm_dp_wide_bus_available(const struct msm_dp *msm_dp_display) { struct msm_dp_display_private *dp; + struct msm_dp_panel *dp_panel; dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); - if (dp->msm_dp_mode.out_fmt_is_yuv_420) + dp_panel = dp->panel; + + if (dp_panel->msm_dp_mode.out_fmt_is_yuv_420) return false; return dp->wide_bus_supported; @@ -1501,10 +1503,6 @@ void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, bool force_link_train = false; msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); - if (!msm_dp_display->msm_dp_mode.drm_mode.clock) { - DRM_ERROR("invalid params\n"); - return; - } if (dp->is_edp) msm_dp_hpd_plug_handle(msm_dp_display, 0); @@ -1516,13 +1514,6 @@ void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, return; } - rc = msm_dp_display_set_mode(dp, &msm_dp_display->msm_dp_mode); - if (rc) { - DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc); - mutex_unlock(&msm_dp_display->event_mutex); - return; - } - state = msm_dp_display->hpd_state; if (state == ST_CONNECTED && !dp->power_on) { @@ -1599,37 +1590,40 @@ void msm_dp_bridge_mode_set(struct drm_bridge *drm_bridge, struct msm_dp *dp = msm_dp_bridge->msm_dp_display; struct msm_dp_display_private *msm_dp_display; struct msm_dp_panel *msm_dp_panel; + struct msm_dp_display_mode msm_dp_mode; msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); msm_dp_panel = msm_dp_display->panel; - memset(&msm_dp_display->msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); + memset(&msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); if (msm_dp_display_check_video_test(dp)) - msm_dp_display->msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp); + msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp); else /* Default num_components per pixel = 3 */ - msm_dp_display->msm_dp_mode.bpp = dp->connector->display_info.bpc * 3; + msm_dp_mode.bpp = dp->connector->display_info.bpc * 3; - if (!msm_dp_display->msm_dp_mode.bpp) - msm_dp_display->msm_dp_mode.bpp = 24; /* Default bpp */ + if (!msm_dp_mode.bpp) + msm_dp_mode.bpp = 24; /* Default bpp */ - drm_mode_copy(&msm_dp_display->msm_dp_mode.drm_mode, adjusted_mode); + drm_mode_copy(&msm_dp_mode.drm_mode, adjusted_mode); - msm_dp_display->msm_dp_mode.v_active_low = - !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); + msm_dp_mode.v_active_low = + !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); - msm_dp_display->msm_dp_mode.h_active_low = - !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); + msm_dp_mode.h_active_low = + !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); - msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 = + msm_dp_mode.out_fmt_is_yuv_420 = drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) && msm_dp_panel->vsc_sdp_supported; + msm_dp_display_set_mode(dp, &msm_dp_mode); + /* populate wide_bus_support to different layers */ msm_dp_display->ctrl->wide_bus_en = - msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported; + msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported; msm_dp_display->catalog->wide_bus_en = - msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported; + msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported; } void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge)