From patchwork Tue Dec 31 08:11:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashanth K X-Patchwork-Id: 854508 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D43FA1925B6; Tue, 31 Dec 2024 08:12:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735632737; cv=none; b=gCtZjIsMZ1+yuwlNdJ+wX3HscCqnb5hGxz/YL05SC53NTe/r2YVe1VkducBHWejRqlAReRso0m3N6bis7CRd1xoASaIWQdlwoOeOnMAnynGFKECac5JMoOzjLdXT2rT4KfPt+qq6Y+td8bFbDgdcV9oJv64inCeLloQ+bushtuA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735632737; c=relaxed/simple; bh=9KJ/147zAzuuD6/MPW7Bhv+aQbj0zu3ZtU+Vb/v2SRQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qWDOeQhaj2idwo172lG3js5ijQLGJScYnZeWqsh7fjp0BuTdypVxbz0jF/ghbVkVX7ZVyl0KrRgGh6Es7QRhHpnOwi7TLXSZsQrFlD0+W9SBiwJxvUh3ECD6gB/F587ktO+6Ik80A+TVp51oOXmb3RaClL1w2WzcTQh5lmqSOrw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=aZWJbTBv; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="aZWJbTBv" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4BV4qug1019932; Tue, 31 Dec 2024 08:12:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= QxzpEczxL860D3rNkuhBh/TBPOpGUqn3zpD6eIS7Pck=; b=aZWJbTBvhKyGV45r kdbMsNmAF4zX5rQmy7n3OffvwmfG+RVNg5FXbuO3kHj03O7grTxqBHzl1NapCWxL fw1UKbcZJ7h+iBN3Wo0h07hwX8TEmEgbQBQST3oNiiZIfryQUyHW49UWSkSwaRfO TVrvvzhwkgz1A6EwWpOu/Ni9jkFnzDE2YPoT/pns+vJrh13wzje7bg6SjFopzDzj luqfgcOF5O2fRbQYXOTBekxk2ILHsFEQbe9kDFJGJaGrzC4ceskHa8f6foFOTLox 3kKKaal3JxhhhTBj1rGiBmrdTSbSLSfoz0+BQOcA6vPu2+/IygCLy6R9bxTT6aRj d0SqIg== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43v9yk8d6k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Dec 2024 08:12:12 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BV8CBXi001503 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Dec 2024 08:12:11 GMT Received: from hu-prashk-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 31 Dec 2024 00:12:07 -0800 From: Prashanth K To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Kurapati CC: , , , , Prashanth K , Konrad Dybcio Subject: [PATCH v4 10/17] arm64: dts: qcom: sdm845: Disable USB U1/U2 entry Date: Tue, 31 Dec 2024 13:41:08 +0530 Message-ID: <20241231081115.3149850-11-quic_prashk@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241231081115.3149850-1-quic_prashk@quicinc.com> References: <20241231081115.3149850-1-quic_prashk@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zxIfPB4LlnYfgbZKxx5yFfTZMNsn6Zv1 X-Proofpoint-GUID: zxIfPB4LlnYfgbZKxx5yFfTZMNsn6Zv1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 clxscore=1015 malwarescore=0 adultscore=0 mlxscore=0 mlxlogscore=506 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412310067 Disable U1 and U2 power-saving states to improve stability of USB. These low-power link states, designed to reduce power consumption during idle periods, can cause issues in latency-sensitive or high throughput use cases. Over the years, some of the issues seen are as follows: 1. In device mode of operation, when UVC is active, enabling U1/U2 is sometimes causing packets drops due to delay in entry/exit of intermittent these low power states. These packet drops are often reflected as missed isochronous transfers, as the controller wasn't able to send packet in that microframe interval and hence glitches are seen on the final transmitted video output. 2. On older targets like SM8150/SM8250/SM8350, there have been throughput issues seen during tethering use cases. Disabling these intermittent power states enhances device stability without affecting power usage. Signed-off-by: Prashanth K Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1ed794638a7c..373a591bfb4d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4139,6 +4139,8 @@ usb_1_dwc3: usb@a600000 { snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; snps,parkmode-disable-ss-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; @@ -4215,6 +4217,8 @@ usb_2_dwc3: usb@a800000 { snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; snps,parkmode-disable-ss-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; };