From patchwork Tue Dec 31 08:11:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashanth K X-Patchwork-Id: 854510 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A06719CC11; Tue, 31 Dec 2024 08:11:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735632719; cv=none; b=Ic7iylKEs1t1uiexfkrEz32tP5rmk6Zge3Qr1DiIP2UO3wESYiVyTUNHDF1ZbtmZFQafRrnV0GDoiUiwz154w2gxI3RT/AZBtqDnjy9C1V/wTR3hf+p25TDhq0R80mR0f9jGcpTKtT9jRxesy4zhLf/vofUd+TgZSnytTITJ9ok= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735632719; c=relaxed/simple; bh=/rLiu+dCr3k4YrqFWE31wIPfHZbuzm+q+hIh16AO/hs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TtskbCoDRfGVwoQiYAROyLPdB40VDbdU2dQgeg5oG4KXFGbPiIxVmFHwbRO8gNjKU3vSEzO2v0of9ytLk5H1eom/fuDWBtgvuI1bF9/sY2PamK4iQRknZOHcGA/07QtcJVU27CfdUPLvoPLWyeEKf0C5fOoun3J7Y/XbBM0wt50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=NYOOJiNS; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="NYOOJiNS" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4BV2lR81016129; Tue, 31 Dec 2024 08:11:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= siRO3xOX08CCENpIQvN2fVSVm9pq7sH9FNIMLARibFs=; b=NYOOJiNSMtYC3IDv ZgjFOVOBr/mwXubW0cLH0hSQbZa1FMYE5comDw2Qi+wkIFwktIciD0m/JcAZiw/I JnW80Azz46HylOnoIQMiizHUsaGF0UpllTky9tuBaJDUvdApaTyt7kCcVT/V+qW4 cjck8BSg4kUM7ULW+kqXbJrb6izVAXzKdPyjVRRzlk41zyKogz46ovLYT4VR/eZM Hv3VO8jlDT16RjE5nvt/qUoSOd4/FFu/64a8OIhPy/nRME9PiNW0epKNf4CXxrP1 rJs/N/FBeaqwtuHOw9dBvlo02+C2ef6bKmlMGS/gF/IL8RWD4YJ0DDXiNHlE8R57 BipuRg== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43v84y8ks1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Dec 2024 08:11:54 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BV8BsWT032433 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Dec 2024 08:11:54 GMT Received: from hu-prashk-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 31 Dec 2024 00:11:50 -0800 From: Prashanth K To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Kurapati CC: , , , , Prashanth K , Konrad Dybcio Subject: [PATCH v4 06/17] arm64: dts: qcom: sm6350: Disable USB U1/U2 entry Date: Tue, 31 Dec 2024 13:41:04 +0530 Message-ID: <20241231081115.3149850-7-quic_prashk@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241231081115.3149850-1-quic_prashk@quicinc.com> References: <20241231081115.3149850-1-quic_prashk@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: j74Uge_niQXVLrZgRhF27W21ZHQjyU2y X-Proofpoint-ORIG-GUID: j74Uge_niQXVLrZgRhF27W21ZHQjyU2y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=523 priorityscore=1501 malwarescore=0 impostorscore=0 suspectscore=0 clxscore=1015 spamscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412310068 From: Krishna Kurapati Disable U1 and U2 power-saving states to improve stability of USB. These low-power link states, designed to reduce power consumption during idle periods, can cause issues in latency-sensitive or high throughput use cases. Over the years, some of the issues seen are as follows: 1. In device mode of operation, when UVC is active, enabling U1/U2 is sometimes causing packets drops due to delay in entry/exit of intermittent these low power states. These packet drops are often reflected as missed isochronous transfers, as the controller wasn't able to send packet in that microframe interval and hence glitches are seen on the final transmitted video output. 2. On older targets like SM8150/SM8250/SM8350, there have been throughput issues seen during tethering use cases. Disabling these intermittent power states enhances device stability without affecting power usage. Signed-off-by: Krishna Kurapati Signed-off-by: Prashanth K Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 8d697280249f..e64447b765a2 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1924,6 +1924,8 @@ usb_1_dwc3: usb@a600000 { snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,parkmode-disable-ss-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; usb-role-switch;