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[2001:14ba:a0c3:3a00::782]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54223832c1bsm4261655e87.280.2025.01.03.22.19.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jan 2025 22:19:24 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 04 Jan 2025 08:19:15 +0200 Subject: [PATCH v3 4/5] nvmem: qfprom: switch to 4-byte aligned reads Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250104-sar2130p-nvmem-v3-4-a94e0b7de2fa@linaro.org> References: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> In-Reply-To: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Akhil P Oommen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2302; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Weli6Ud1pnhnVMQNhXbarzN29phyH4B6NUF7IDp6kk8=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBneNLh+pWuyicpF7JwINd5cxvcSYzG01R6FRlle hKcTcxue62JAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZ3jS4QAKCRAU23LtvoBl uFQ1D/0eitlPWKeOQfigM1W6o1iU/oO/yWjCv7h42icKzawH7fw+evIC35b3Pfv+UhxQYvlPoI1 ZYKMgZUFDXU0RArciTtvD5hhjevdOSY6MgQL113UCgDlxfGs/djsxIxj5m4sUKIs3fyZUGjmgVW TajAv26H8istC0y7hfpfwa4ogk2pq5xdv17p+uBWBMDUjAbRxub5N1zA2kYUHHIIqcWo2YdHo56 gexH/TQ03jxOiKdnAyyTGDn+EscyiOe+sOeoHkXjJObaaeSybCWTKmaYs+WQCKBTjNq+0eGoepj Lcz9qH7Tv/ZXb+JB5sCJSi3jRqBhrR1Pepfsmdx7DmQjYa58sy4DGS0blg6qfQLeRBcPkt/dns/ ZFwoV0z2Th+mgLHBlYwmTpix1YEn3v4Fpm1clqsDqQQImH5pZIuJsJ6LCD2ciVa7kEU2GtROobn rFGtVFG/M29Wq1bzNOga/5BPRnXFQmcF74KEaBwWRxfewSqeWj+t4P+w0TbVSDtFSTMqIUK/VkR N6u50Mu1gE5wZV/xUGTIqbqzwMjLfb0zdM5MnKiuS0OU0FPt5BvCHKr+ZT3W7JqsqnkhF3l1GKa AnQDGIlK3OmtDoyNDGgxj4DofIlpNseoNg9TFxP9HTVR4kwPI9seli/hgIHxqXpf8Wzje7ZJygu ZHRfUV574Tt4T9Q== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A All platforms since Snapdragon 8 Gen1 (SM8450) require using 4-byte reads to access QFPROM data. While older platforms were more than happy with 1-byte reads, change the qfprom driver to use 4-byte reads for all the platforms. Specify stride and word size of 4 bytes. To retain compatibility with the existing DT and to simplify porting data from vendor kernels, use fixup_dt_cell_info in order to bump alignment requirements. Signed-off-by: Dmitry Baryshkov --- drivers/nvmem/qfprom.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index 116a39e804c70b4a0374f8ea3ac6ba1dd612109d..a872c640b8c5a558da9ea00e3804c904f8987247 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -321,19 +321,32 @@ static int qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) { struct qfprom_priv *priv = context; - u8 *val = _val; - int i = 0, words = bytes; + u32 *val = _val; void __iomem *base = priv->qfpcorrected; + int words = DIV_ROUND_UP(bytes, sizeof(u32)); + int i; if (read_raw_data && priv->qfpraw) base = priv->qfpraw; - while (words--) - *val++ = readb(base + reg + i++); + for (i = 0; i < words; i++) + *val++ = readl(base + reg + i * sizeof(u32)); return 0; } +/* Align reads to word boundary */ +static void qfprom_fixup_dt_cell_info(struct nvmem_device *nvmem, + struct nvmem_cell_info *cell) +{ + unsigned int byte_offset = cell->offset % sizeof(u32); + + cell->bit_offset += byte_offset * BITS_PER_BYTE; + cell->offset -= byte_offset; + if (byte_offset && !cell->nbits) + cell->nbits = cell->bytes * BITS_PER_BYTE; +} + static void qfprom_runtime_disable(void *data) { pm_runtime_disable(data); @@ -358,10 +371,11 @@ static int qfprom_probe(struct platform_device *pdev) struct nvmem_config econfig = { .name = "qfprom", .add_legacy_fixed_of_cells = true, - .stride = 1, - .word_size = 1, + .stride = 4, + .word_size = 4, .id = NVMEM_DEVID_AUTO, .reg_read = qfprom_reg_read, + .fixup_dt_cell_info = qfprom_fixup_dt_cell_info, }; struct device *dev = &pdev->dev; struct resource *res;