Message ID | 20250203063427.358327-4-alexeymin@postmarketos.org |
---|---|
State | New |
Headers | show |
Series | Add missing SDCC resets for SDM630/660 | expand |
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index a2c079bac1a7..3722e405a97c 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1379,6 +1379,7 @@ sdhc_2: mmc@c084000 { <&xo_board>; clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC2_BCR>; interconnects = <&a2noc 3 &a2noc 10>, <&gnoc 0 &cnoc 28>; @@ -1433,6 +1434,8 @@ sdhc_1: mmc@c0c4000 { <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "iface", "core", "xo", "ice"; + resets = <&gcc GCC_SDCC1_BCR>; + interconnects = <&a2noc 2 &a2noc 10>, <&gnoc 0 &cnoc 27>; interconnect-names = "sdhc-ddr", "cpu-sdhc";