| Message ID | 20250221-lpass_qcm6490_resets-v5-1-6be0c0949a83@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Update LPASS Audio clock driver for QCM6490 board | expand |
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index 488d63959424088ede67835eb4dcf3feef6d0848..99ab9106009f87549d4c4f2dd4ec7bc010e611d3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,qcm6490-lpassaudiocc - qcom,sc7280-lpassaoncc - qcom,sc7280-lpassaudiocc - qcom,sc7280-lpasscorecc @@ -68,7 +69,9 @@ allOf: properties: compatible: contains: - const: qcom,sc7280-lpassaudiocc + enum: + - qcom,qcm6490-lpassaudiocc + - qcom,sc7280-lpassaudiocc then: properties:
On the QCM6490 boards, the LPASS firmware controls the complete clock controller functionalities and associated power domains. However, only the LPASS resets required to be controlled by the high level OS. Thus, add the new QCM6490 compatible to support the reset functionality for Low Power Audio subsystem. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)