| Message ID | 20250429092430.21477-7-quic_pkumpatl@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable audio on qcs6490-RB3Gen2 and qcm6490-idp boards | expand |
On 4/29/2025 4:31 PM, Konrad Dybcio wrote: > On 4/29/25 11:24 AM, Prasad Kumpatla wrote: >> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >> >> Add nodes for WSA8830 speakers and WCD9370 headset codec >> on qcm6490-idp board. >> >> Enable lpass macros along with audio support pin controls. >> >> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 162 +++++++++++++++++++++++ >> 1 file changed, 162 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts >> index 7a155ef6492e..1a59080cbfaf 100644 >> --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts >> +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts >> @@ -18,6 +18,7 @@ >> #include "pm7325.dtsi" >> #include "pm8350c.dtsi" >> #include "pmk8350.dtsi" >> +#include "qcs6490-audioreach.dtsi" >> >> /delete-node/ &ipa_fw_mem; >> /delete-node/ &rmtfs_mem; >> @@ -169,6 +170,30 @@ >> regulator-min-microvolt = <3700000>; >> regulator-max-microvolt = <3700000>; >> }; >> + >> + wcd9370: audio-codec-0 { >> + compatible = "qcom,wcd9370-codec"; >> + >> + pinctrl-0 = <&wcd_reset_n>; >> + pinctrl-1 = <&wcd_reset_n_sleep>; >> + pinctrl-names = "default", "sleep"; > > Does audio work for you? For inexplicable reasons, it didn't for me > on rb2 when the sleep state was defined > For Qcm6490-IDP board Audio is working fine, Not sure about rb2, Could you please provide more details about rb2 ?>> + >> + reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; >> + >> + vdd-buck-supply = <&vreg_l17b_1p7>; >> + vdd-rxtx-supply = <&vreg_l18b_1p8>; >> + vdd-px-supply = <&vreg_l18b_1p8>; >> + vdd-mic-bias-supply = <&vreg_bob_3p296>; >> + >> + qcom,micbias1-microvolt = <1800000>; >> + qcom,micbias2-microvolt = <1800000>; >> + qcom,micbias3-microvolt = <1800000>; >> + >> + qcom,rx-device = <&wcd937x_rx>; >> + qcom,tx-device = <&wcd937x_tx>; >> + >> + #sound-dai-cells = <1>; >> + }; >> }; >> >> &apps_rsc { >> @@ -536,6 +561,76 @@ >> firmware-name = "qcom/qcm6490/a660_zap.mbn"; >> }; >> >> +&lpass_dmic01_clk { >> + drive-strength = <8>; >> + bias-disable; >> +}; >> + >> +&lpass_dmic01_data { >> + bias-pull-down; > > As a testament to these definitions belonging in the soc dtsi, you > added them in the file you included already. > > [...] Ack, Will move to soc dtsi file.> >> &tlmm { >> gpio-reserved-ranges = <32 2>, /* ADSP */ >> <48 4>; /* NFC */ >> @@ -725,6 +868,25 @@ >> function = "gpio"; >> bias-pull-up; >> }; >> + >> + sw_ctrl: sw-ctrl-state { >> + pins = "gpio86"; >> + function = "gpio"; >> + bias-pull-down; >> + }; > > Again, unused Ack> >> + >> + wcd_reset_n: wcd-reset-n-state { >> + pins = "gpio83"; >> + function = "gpio"; >> + drive-strength = <8>; > > Since the definition is otherwise identical to the sleep state, > you should define the (other) bias type that should be set when > active. > Taken the reference from sc7280, which is working fine. Link for reference : https://elixir.bootlin.com/linux/v6.15-rc5/source/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi#L841 Will cross check and modify if required. Thanks, Prasad> Konrad > > + }; >> + >> + wcd_reset_n_sleep: wcd-reset-n-sleep-state { >> + pins = "gpio83"; >> + function = "gpio"; >> + drive-strength = <8>; >> + bias-disable; >> + }; >> }; >> >> &uart5 {
On 5/8/25 7:01 PM, Prasad Kumpatla wrote: > > > On 4/29/2025 4:31 PM, Konrad Dybcio wrote: >> On 4/29/25 11:24 AM, Prasad Kumpatla wrote: >>> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >>> >>> Add nodes for WSA8830 speakers and WCD9370 headset codec >>> on qcm6490-idp board. >>> >>> Enable lpass macros along with audio support pin controls. >>> >>> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >>> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >>> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 162 +++++++++++++++++++++++ >>> 1 file changed, 162 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts >>> index 7a155ef6492e..1a59080cbfaf 100644 >>> --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts >>> +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts >>> @@ -18,6 +18,7 @@ >>> #include "pm7325.dtsi" >>> #include "pm8350c.dtsi" >>> #include "pmk8350.dtsi" >>> +#include "qcs6490-audioreach.dtsi" >>> /delete-node/ &ipa_fw_mem; >>> /delete-node/ &rmtfs_mem; >>> @@ -169,6 +170,30 @@ >>> regulator-min-microvolt = <3700000>; >>> regulator-max-microvolt = <3700000>; >>> }; >>> + >>> + wcd9370: audio-codec-0 { >>> + compatible = "qcom,wcd9370-codec"; >>> + >>> + pinctrl-0 = <&wcd_reset_n>; >>> + pinctrl-1 = <&wcd_reset_n_sleep>; >>> + pinctrl-names = "default", "sleep"; >> >> Does audio work for you? For inexplicable reasons, it didn't for me >> on rb2 when the sleep state was defined >> > For Qcm6490-IDP board Audio is working fine, Not sure about rb2, Could you please provide more details about rb2 ? I just mentioned it as something to keep in mind. Someone else has taken over that work since. [...] >>> + wcd_reset_n: wcd-reset-n-state { >>> + pins = "gpio83"; >>> + function = "gpio"; >>> + drive-strength = <8>; >> >> Since the definition is otherwise identical to the sleep state, >> you should define the (other) bias type that should be set when >> active. >> > Taken the reference from sc7280, which is working fine. > Link for reference : https://elixir.bootlin.com/linux/v6.15-rc5/source/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi#L841 > > Will cross check and modify if required. sure it will work fine, but in the same spirit typing 147 as 1+1+1+... will work fine as well, please doublecheck :D Konrad
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts index 7a155ef6492e..1a59080cbfaf 100644 --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts @@ -18,6 +18,7 @@ #include "pm7325.dtsi" #include "pm8350c.dtsi" #include "pmk8350.dtsi" +#include "qcs6490-audioreach.dtsi" /delete-node/ &ipa_fw_mem; /delete-node/ &rmtfs_mem; @@ -169,6 +170,30 @@ regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; }; + + wcd9370: audio-codec-0 { + compatible = "qcom,wcd9370-codec"; + + pinctrl-0 = <&wcd_reset_n>; + pinctrl-1 = <&wcd_reset_n_sleep>; + pinctrl-names = "default", "sleep"; + + reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; + + vdd-buck-supply = <&vreg_l17b_1p7>; + vdd-rxtx-supply = <&vreg_l18b_1p8>; + vdd-px-supply = <&vreg_l18b_1p8>; + vdd-mic-bias-supply = <&vreg_bob_3p296>; + + qcom,micbias1-microvolt = <1800000>; + qcom,micbias2-microvolt = <1800000>; + qcom,micbias3-microvolt = <1800000>; + + qcom,rx-device = <&wcd937x_rx>; + qcom,tx-device = <&wcd937x_tx>; + + #sound-dai-cells = <1>; + }; }; &apps_rsc { @@ -536,6 +561,76 @@ firmware-name = "qcom/qcm6490/a660_zap.mbn"; }; +&lpass_dmic01_clk { + drive-strength = <8>; + bias-disable; +}; + +&lpass_dmic01_data { + bias-pull-down; +}; + +&lpass_dmic23_clk { + drive-strength = <8>; + bias-disable; +}; + +&lpass_dmic23_data { + bias-pull-down; +}; + +&lpass_rx_macro { + status = "okay"; +}; + +&lpass_rx_swr_clk { + drive-strength = <2>; + slew-rate = <1>; + bias-disable; +}; + +&lpass_rx_swr_data { + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; +}; + +&lpass_tx_macro { + status = "okay"; +}; + +&lpass_tx_swr_clk { + drive-strength = <2>; + slew-rate = <1>; + bias-disable; +}; + +&lpass_tx_swr_data { + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; +}; + +&lpass_va_macro { + status = "okay"; +}; + +&lpass_wsa_macro { + status = "okay"; +}; + +&lpass_wsa_swr_clk { + drive-strength = <2>; + slew-rate = <1>; + bias-disable; +}; + +&lpass_wsa_swr_data { + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; +}; + &mdss { status = "okay"; }; @@ -716,6 +811,54 @@ cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; }; +&swr0 { + status = "okay"; + + wcd937x_rx: codec@0,4 { + compatible = "sdw20217010a00"; + reg = <0 4>; + qcom,rx-port-mapping = <1 2 3 4 5>; + qcom,rx-channel-mapping = /bits/ 8 <1 2 1 1 2 1 1 2>; + }; +}; + +&swr1 { + status = "okay"; + + wcd937x_tx: codec@0,3 { + compatible = "sdw20217010a00"; + reg = <0 3>; + qcom,tx-port-mapping = <1 1 2 3>; + qcom,tx-channel-mapping = /bits/ 8 <1 2 1 1 2 3 3 4 1 2 3 4>; + }; +}; + +&swr2 { + status = "okay"; + + left_spkr: speaker@0,1 { + compatible = "sdw10217020200"; + reg = <0 1>; + powerdown-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + sound-name-prefix = "SpkrLeft"; + #thermal-sensor-cells = <0>; + vdd-supply = <&vreg_l18b_1p8>; + qcom,port-mapping = <1 2 3 7>; + }; + + right_spkr: speaker@0,2 { + compatible = "sdw10217020200"; + reg = <0 2>; + powerdown-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + sound-name-prefix = "SpkrRight"; + #thermal-sensor-cells = <0>; + vdd-supply = <&vreg_l18b_1p8>; + qcom,port-mapping = <4 5 6 8>; + }; +}; + &tlmm { gpio-reserved-ranges = <32 2>, /* ADSP */ <48 4>; /* NFC */ @@ -725,6 +868,25 @@ function = "gpio"; bias-pull-up; }; + + sw_ctrl: sw-ctrl-state { + pins = "gpio86"; + function = "gpio"; + bias-pull-down; + }; + + wcd_reset_n: wcd-reset-n-state { + pins = "gpio83"; + function = "gpio"; + drive-strength = <8>; + }; + + wcd_reset_n_sleep: wcd-reset-n-sleep-state { + pins = "gpio83"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; }; &uart5 {