From patchwork Thu Oct 6 01:06:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Asutosh Das X-Patchwork-Id: 613908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 984C6C433F5 for ; Thu, 6 Oct 2022 01:07:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230077AbiJFBHw (ORCPT ); Wed, 5 Oct 2022 21:07:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230000AbiJFBHa (ORCPT ); Wed, 5 Oct 2022 21:07:30 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBC3377543; Wed, 5 Oct 2022 18:07:10 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29616to7032285; Thu, 6 Oct 2022 01:06:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=b10xtwe0/ZQtNK1whDKT3awuudA3fcxz6kVTfjDGSg0=; b=MvbjEefpq//Kp2ToAMKdPXHB5YVj2oW3+kPAXxhNrn2SlyiHSXNUikzaGVZLEAkas+xv ZzWj6osb8L8qC1ZjM1DSQAtnAWQ5zcp3d3sr5TXNb8yQDRO5uCDJXAvT5YDjuDpdY2OX DZ0GyOOy7G31LVcGRMNdezWyIBwwM8f8wPy+811V+lU2RfGooqA+EI+RcVkkJcd3kfPm 75hJJDvMvC/O++GCChqIPcjR38TsDR2d23CtrzuK9idi/O48YH2mjldWXrrriT4HwtIp F/sR3g82PtpYFMvXE5sPziSG7yVlOF/DuOv/DTNjewBHfW8HGhu7+1fIPrvX4961EVzI 0Q== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3k1kva04js-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 06 Oct 2022 01:06:55 +0000 Received: from nasanex01a.na.qualcomm.com ([10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 29616sRu017638 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Oct 2022 01:06:54 GMT Received: from asutoshd-linux1.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 5 Oct 2022 18:06:54 -0700 From: Asutosh Das To: , , , , , CC: Asutosh Das , , , , , , , Subject: [PATCH v2 16/17] ufs: core: mcq: Enable Multi Circular Queue Date: Wed, 5 Oct 2022 18:06:15 -0700 Message-ID: <8677cdf1bf7d5b3e3fe560c864378c22b0d59cea.1665017636.git.quic_asutoshd@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pqHTrqw8SCpMqSSIXiVm-T5fJVvM53e8 X-Proofpoint-ORIG-GUID: pqHTrqw8SCpMqSSIXiVm-T5fJVvM53e8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-05_05,2022-10-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=856 impostorscore=0 mlxscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 suspectscore=0 phishscore=0 priorityscore=1501 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210060005 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable MCQ in the Host Controller. Signed-off-by: Asutosh Das --- drivers/ufs/core/ufshcd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index f1a9b26..d6303fc 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -8319,6 +8319,10 @@ static int ufshcd_config_mcq(struct ufs_hba *hba) hba->host->can_queue = hba->nutrs - UFSHCD_NUM_RESERVED; hba->reserved_slot = hba->nutrs - UFSHCD_NUM_RESERVED; + /* Select MCQ mode */ + ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x1, + REG_UFS_MEM_CFG); + hba->mcq_enabled = true; dev_info(hba->dev, "MCQ configured, nr_queues=%d, io_queues=%d, read_queue=%d, poll_queues=%d, queue_depth=%d\n", hba->nr_hw_queues, hba->nr_queues[HCTX_TYPE_DEFAULT], hba->nr_queues[HCTX_TYPE_READ], hba->nr_queues[HCTX_TYPE_POLL],