From patchwork Tue Aug 10 17:54:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Souradeep Chowdhury X-Patchwork-Id: 494426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75791C432BE for ; Tue, 10 Aug 2021 17:58:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5A2AA603E7 for ; Tue, 10 Aug 2021 17:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236545AbhHJR7B (ORCPT ); Tue, 10 Aug 2021 13:59:01 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:13535 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236674AbhHJR47 (ORCPT ); Tue, 10 Aug 2021 13:56:59 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1628618196; h=References: In-Reply-To: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=0PQjsk0YFzQABZQmXhT98xy/Jf01XmQa8lqVp4PFMHg=; b=jwPy5zhJ4F2nJmIEvAUtEokG6MZGVBfax7QQEX9MyQnBt29NfzuX+3NK2PSy0xxyGDpEExzp Pldloji5c07rYnpagdNyfY5Bzy7+0Hve8GmvAIVjl5T4zRAbwDPIEoFdz3rT5VEGWW2RaDEG IijWm7KmBr6CRoB21MhRxWe1Ebc= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 6112bdc591487ad520d8d43e (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 10 Aug 2021 17:56:21 GMT Sender: schowdhu=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id CC9BBC3596B; Tue, 10 Aug 2021 17:56:20 +0000 (UTC) Received: from blr-ubuntu-525.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: schowdhu) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5D443C41633; Tue, 10 Aug 2021 17:56:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5D443C41633 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=schowdhu@codeaurora.org From: Souradeep Chowdhury To: Andy Gross , Bjorn Andersson , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Sai Prakash Ranjan , Sibi Sankar , Rajendra Nayak , vkoul@kernel.org, Souradeep Chowdhury Subject: [PATCH V6 6/7] arm64: dts: qcom: sc7180: Add Data Capture and Compare(DCC) support node Date: Tue, 10 Aug 2021 23:24:42 +0530 Message-Id: <92e68884f106d31524ea52fd8ac7d136fbbe6e5f.1628617260.git.schowdhu@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the DCC(Data Capture and Compare) device tree node entry along with the address of the register region. Signed-off-by: Souradeep Chowdhury --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 47b20ba..6e7221d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2071,6 +2071,12 @@ #power-domain-cells = <1>; }; + dma@10a2000 { + compatible = "qcom,sc7180-dcc", "qcom,dcc"; + reg = <0x0 0x010a2000 0x0 0x1000>, + <0x0 0x010ae000 0x0 0x2000>; + }; + stm@6002000 { compatible = "arm,coresight-stm", "arm,primecell"; reg = <0 0x06002000 0 0x1000>,