Message ID | AM9PR04MB8506A1FAC2DA26F27771D039E2832@AM9PR04MB8506.eurprd04.prod.outlook.com |
---|---|
State | New |
Headers | show |
Series | [v2,1/7] net: driver: stmmac: extend CSR calc support | expand |
On Mon, Aug 19, 2024 at 08:21:03AM +0200, Krzysztof Kozlowski wrote: > On 18/08/2024 23:50, Jan Petrous (OSS) wrote: > > Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx > > and S32R45 automotive series SoCs. > > Fix your email threading. b4 handle everything correctly, so start using it. > Done. V3 will be sent by b4/msmtp. > > > > Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> > > --- > > .../bindings/net/nxp,s32cc-dwmac.yaml | 127 ++++++++++++++++++ > > .../devicetree/bindings/net/snps,dwmac.yaml | 1 + > > 2 files changed, 128 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml > > > > diff --git a/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml > > new file mode 100644 > > index 000000000000..443ad918a9a5 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml > > Filename based on compatible, so what does "cc" stand for? Ok, removed 'cc'. > > > @@ -0,0 +1,127 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +# Copyright 2021-2024 NXP > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/nxp,s32cc-dwmac.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller > > + > > +maintainers: > > + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com> > > + > > +description: | > > Do not need '|' unless you need to preserve formatting. Removed. > > > + This device is a platform glue layer for stmmac. > > Drop description of driver and instead describe the hardware. Changed in v3. > > > + Please see snps,dwmac.yaml for the other unchanged properties. > > + > > +properties: > > + compatible: > > + enum: > > + - nxp,s32g2-dwmac > > + - nxp,s32g3-dwmac > > + - nxp,s32r45-dwmac > > + > > + reg: > > + items: > > + - description: Main GMAC registers > > + - description: GMAC PHY mode control register > > + > > + interrupts: > > + description: Common GMAC interrupt > > No, instead maxItems: 1 > Done. > > + > > + interrupt-names: > > + const: macirq > > + > > + clocks: > > + items: > > + - description: Main GMAC clock > > + - description: Transmit clock > > + - description: Receive clock > > + - description: PTP reference clock > > + > > + clock-names: > > + items: > > + - const: stmmaceth > > + - const: tx > > + - const: rx > > + - const: ptp_ref > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - interrupt-names > > + - clocks > > + - clock-names > > + - phy-mode > > Drop, snps,dwmac requires this. Compressed to 'clocks' and 'clock-names'. > > > + > > +allOf: > > + - $ref: snps,dwmac.yaml# > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/interrupt-controller/irq.h> > > + #include <dt-bindings/phy/phy.h> > > + bus { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + ethernet@4033c000 { > > + compatible = "nxp,s32cc-dwmac"; > > + reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ > > + <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "macirq"; > > + snps,mtl-rx-config = <&mtl_rx_setup>; > > + snps,mtl-tx-config = <&mtl_tx_setup>; > > + clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; > > + clock-names = "stmmaceth", "tx", "rx", "ptp_ref"; > > + phy-mode = "rgmii-id"; > > + phy-handle = <&phy0>; > > + > > + mtl_rx_setup: rx-queues-config { > > + snps,rx-queues-to-use = <5>; > > + > > + queue0 { > > + }; > > + queue1 { > > + }; > > > Why listing empty nodes? Removed in v3. > > Best regards, > Krzysztof > Thanks. /Jan
diff --git a/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml new file mode 100644 index 000000000000..443ad918a9a5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2021-2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nxp,s32cc-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller + +maintainers: + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com> + +description: | + This device is a platform glue layer for stmmac. + Please see snps,dwmac.yaml for the other unchanged properties. + +properties: + compatible: + enum: + - nxp,s32g2-dwmac + - nxp,s32g3-dwmac + - nxp,s32r45-dwmac + + reg: + items: + - description: Main GMAC registers + - description: GMAC PHY mode control register + + interrupts: + description: Common GMAC interrupt + + interrupt-names: + const: macirq + + clocks: + items: + - description: Main GMAC clock + - description: Transmit clock + - description: Receive clock + - description: PTP reference clock + + clock-names: + items: + - const: stmmaceth + - const: tx + - const: rx + - const: ptp_ref + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - phy-mode + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/phy/phy.h> + bus { + #address-cells = <2>; + #size-cells = <2>; + + ethernet@4033c000 { + compatible = "nxp,s32cc-dwmac"; + reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ + <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; + clock-names = "stmmaceth", "tx", "rx", "ptp_ref"; + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <5>; + + queue0 { + }; + queue1 { + }; + queue2 { + }; + queue3 { + }; + queue4 { + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <5>; + + queue0 { + }; + queue1 { + }; + queue2 { + }; + queue3 { + }; + queue4 { + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 3eb65e63fdae..3311438f67ee 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -66,6 +66,7 @@ properties: - ingenic,x2000-mac - loongson,ls2k-dwmac - loongson,ls7a-dwmac + - nxp,s32cc-dwmac - qcom,qcs404-ethqos - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos
Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx and S32R45 automotive series SoCs. Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> --- .../bindings/net/nxp,s32cc-dwmac.yaml | 127 ++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 1 + 2 files changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml