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[209.132.180.67]) by mx.google.com with ESMTP id q2si8787138pll.343.2019.02.07.04.56.34; Thu, 07 Feb 2019 04:56:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XvkPpY9t; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727261AbfBGM4e (ORCPT + 15 others); Thu, 7 Feb 2019 07:56:34 -0500 Received: from mail-pl1-f193.google.com ([209.85.214.193]:39062 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727138AbfBGM4e (ORCPT ); Thu, 7 Feb 2019 07:56:34 -0500 Received: by mail-pl1-f193.google.com with SMTP id 101so4747600pld.6 for ; Thu, 07 Feb 2019 04:56:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=QM6AyIeFhqZF+Crf5VtmkjaF1HKzGjJgsV+pTA3g5qA=; b=XvkPpY9t/wv6a6ikREXghG0cLkZ/Cv5jBfBIgOU7lwF5usRmxlds3hPtbFN9LncouH I8o9F6YztPDf39ZbYzuGoTPaHfqfdDCkMnvrLDG7hHNIdjErE1N2hqacQQPWysixODmp tOVep90ZPAB6fw8nlvMxi7tdUKPcxgxigcf2/q1m2L7LGcBwaSHyGZeOeHfBQxAuc0kT 299c9OLb6K/jgaJfdK6S1unB9SE1vaIIoURghoEcLdfOgv5mqbqhFtW8yDhGUdCwifPP HdUm2CZ63I3SWbCFjGitXsdKrY/wI8SuqoZSTv9Jbi2eD675PDPTq+lBPUM4WAVvbWBt /56Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=QM6AyIeFhqZF+Crf5VtmkjaF1HKzGjJgsV+pTA3g5qA=; b=sCkYa2ZaCO4jxjaGwhdO5JjkXS6RPHiic0yI/vAoOEPv3JHtiBN+V3OuTInjrtDjVH WRhozegkYNE7syZue9oOgLdvaJpdEtTTa4WhkBef+IM9BnzRprheL4cakBSlR2rrtWhV jKkp8GDGAZe6TQQ5v9H91ip93COFkc2xiywzOMCQdnFqow+MdDfsI9B9ptltN5VHmRfD StVldsl0Ikpo8qKirZgkuhD3QdfAtYI9Mt+CbAJmpOGWKtAUmSCZo2eHlvKYOHhzPeLD jZObk3gIagYyBq5hSmKy63n7CPo+XFzMSPmkHPeXszq3pAuQu+BZDDHVjY9AFCCrGaO8 J/Mw== X-Gm-Message-State: AHQUAuYzXzHeuWVoIWHbrgkYcjUfmZ4B6xfOfq3MsQACvnlgBaTwh8bJ mkwuEyAa+NnpuhR3GPJTuFknag== X-Received: by 2002:a17:902:622:: with SMTP id 31mr16034547plg.171.1549544193284; Thu, 07 Feb 2019 04:56:33 -0800 (PST) Received: from localhost ([2402:3a80:c80:4138:75dd:3900:1d90:762f]) by smtp.gmail.com with ESMTPSA id c7sm14985464pfa.24.2019.02.07.04.56.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 04:56:32 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: linux-pm@vger.kernel.org Subject: [PATCH v1 16/24] drivers: thermal: tsens: Introduce IP-specific max_sensor count Date: Thu, 7 Feb 2019 16:19:34 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The IP can support 'm' sensors while the platform can enable 'n' sensors of the 'm' where n <= m. Track maximum sensors supported by the IP so that we can correctly track what subset of the sensors are supported on the platform. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 4 ++-- drivers/thermal/qcom/tsens-v0_1.c | 1 + drivers/thermal/qcom/tsens-v2.c | 1 + drivers/thermal/qcom/tsens.h | 2 ++ 4 files changed, 6 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 020409d8daf0..d981effed493 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -208,13 +208,13 @@ int __init init_common(struct tsens_priv *priv) return PTR_ERR(priv->rf[SENSOR_EN]); /* now alloc regmap_fields in tm_map */ - for (i = 0, j = LAST_TEMP_0; i < priv->num_sensors; i++, j++) { + for (i = 0, j = LAST_TEMP_0; i < priv->feat->max_sensors; i++, j++) { priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) return PTR_ERR(priv->rf[j]); } - for (i = 0, j = VALID_0; i < priv->num_sensors; i++, j++) { + for (i = 0, j = VALID_0; i < priv->feat->max_sensors; i++, j++) { priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[j]); if (IS_ERR(priv->rf[j])) diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index ad1052e05e45..4f17b4b781b0 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -324,6 +324,7 @@ const struct tsens_features tsens_v0_1_feat = { .crit_int = 0, .adc = 1, .srot_split = 1, + .max_sensors = 11, }; /* v0.1: 8916, 8974 */ diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index e0aac59d72ec..8052266447f5 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -88,6 +88,7 @@ const struct tsens_features tsens_v2_feat = { .crit_int = 1, .adc = 0, .srot_split = 1, + .max_sensors = 16, }; const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index e0c1ca1a7467..9db89dffb719 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -189,12 +189,14 @@ enum regfield_ids { * @adc: do the sensors only output adc code (instead of temperature)? * @srot_split: does the IP neatly splits the register space into SROT and TM, * with SROT only being available to secure boot firmware? + * @max_sensors: maximum sensors supported by this version of the IP */ struct tsens_features { unsigned int ver_info:1; unsigned int crit_int:1; unsigned int adc:1; unsigned int srot_split:1; + unsigned int max_sensors; }; /**