Message ID | e38071ed7cd54fc6e21f1e3ce3cd97d514d2cf99.1665017636.git.quic_asutoshd@quicinc.com |
---|---|
State | Superseded |
Headers | show
Return-Path: <linux-arm-msm-owner@kernel.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58FABC43217 for <linux-arm-msm@archiver.kernel.org>; Thu, 6 Oct 2022 01:07:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229979AbiJFBHg (ORCPT <rfc822;linux-arm-msm@archiver.kernel.org>); Wed, 5 Oct 2022 21:07:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229969AbiJFBHa (ORCPT <rfc822;linux-arm-msm@vger.kernel.org>); Wed, 5 Oct 2022 21:07:30 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB56E72FCD; Wed, 5 Oct 2022 18:07:10 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2960UJlX028739; Thu, 6 Oct 2022 01:06:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=aayNG3H1C+iIeSaIKuwV8OaEYw5fWM3xjdAI9tCEGR4=; b=CR4EHi3yvLHzt9dTkIDFXLihvCE+CW+/fC1YJnbOrzbyTIvLQnqPka7d7u/6NLVXaWxM X5AOREsLvmUf4X/99dP+sY+1Aur4gztHJf9SOzGTbDlFmQvxc1m9f1tb7yPD2IotiWXj jd9q4qsXaE+TVcwai+D/njIr6Q/NVn4uy3xm5tbOxGOLQOM9f3wWvJgzD/x3q5aJkXFS PmO/hsPMeFYRiBMO+vdiYObXF/NUilzxG0quzDFmOlxSJWnDgj7o76ueTr63l2IYLA9i O7oI/2+rkAfTecIxhLtY/60Py825iWyAyRg6oT17BuNKPkp97Yoji93BCyaVC7hvTxWb Bw== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3k0jtdm8uf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 06 Oct 2022 01:06:55 +0000 Received: from nasanex01a.na.qualcomm.com (corens_vlan604_snip.qualcomm.com [10.53.140.1]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 29616tfG021696 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Oct 2022 01:06:55 GMT Received: from asutoshd-linux1.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 5 Oct 2022 18:06:54 -0700 From: Asutosh Das <quic_asutoshd@quicinc.com> To: <quic_cang@quicinc.com>, <quic_nitirawa@quicinc.com>, <quic_rampraka@quicinc.com>, <quic_bhaskarv@quicinc.com>, <quic_richardp@quicinc.com>, <linux-scsi@vger.kernel.org> CC: Asutosh Das <quic_asutoshd@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <quic_nguyenb@quicinc.com>, <quic_xiaosenh@quicinc.com>, <bvanassche@acm.org>, <avri.altman@wdc.com>, <mani@kernel.org>, <beanhuo@micron.com> Subject: [PATCH v2 17/17] ufs: qcom-host: Enable multi circular queue capability Date: Wed, 5 Oct 2022 18:06:16 -0700 Message-ID: <e38071ed7cd54fc6e21f1e3ce3cd97d514d2cf99.1665017636.git.quic_asutoshd@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <cover.1665017636.git.quic_asutoshd@quicinc.com> References: <cover.1665017636.git.quic_asutoshd@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: bBkE36-ga9fQ8TNe62MHJpIJd4fLlvG5 X-Proofpoint-ORIG-GUID: bBkE36-ga9fQ8TNe62MHJpIJd4fLlvG5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-05_05,2022-10-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 bulkscore=0 malwarescore=0 mlxlogscore=999 priorityscore=1501 clxscore=1015 suspectscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210060005 Precedence: bulk List-ID: <linux-arm-msm.vger.kernel.org> X-Mailing-List: linux-arm-msm@vger.kernel.org |
Series |
Add Multi Circular Queue Support
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expand
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diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 36c40210..b740299 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -853,6 +853,7 @@ static void ufs_qcom_set_caps(struct ufs_hba *hba) hba->caps |= UFSHCD_CAP_CRYPTO; hba->caps |= UFSHCD_CAP_AGGR_POWER_COLLAPSE; hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND; + hba->caps |= UFSHCD_CAP_MCQ_EN; if (host->hw_ver.major >= 0x2) { host->caps = UFS_QCOM_CAP_QUNIPRO |
Enable MCQ for Qualcomm UFS controllers Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> --- drivers/ufs/host/ufs-qcom.c | 1 + 1 file changed, 1 insertion(+)