From patchwork Sat Nov 12 14:10:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 624468 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BD51C4321E for ; Sat, 12 Nov 2022 14:11:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234825AbiKLOLm (ORCPT ); Sat, 12 Nov 2022 09:11:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230170AbiKLOLl (ORCPT ); Sat, 12 Nov 2022 09:11:41 -0500 Received: from hall.aurel32.net (hall.aurel32.net [IPv6:2001:bc8:30d7:100::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E801510B6D; Sat, 12 Nov 2022 06:11:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=Content-Transfer-Encoding:MIME-Version:Message-Id:Date: Subject:Cc:To:From:Content-Type:From:Reply-To:Subject:Content-ID: Content-Description:In-Reply-To:References:X-Debbugs-Cc; bh=qDnpKfCINF8AaQCM/kdrtaCelB7JbA9OSxlcTKm9qWQ=; b=pNulBD0gRNWpXF4O08o85Nzx/h LZR1zb0kVwNQXbGunQUaplLJIu0Zn1xOZjQJizpv07a/KfEhzHtqnUI7eeWoR/04uxvIMie0y2lxI fL1F0gy0GeEJtcmAKt2nn3mUUi/nza8wNegRPq8YW7myY9NgnNSrnt3QmlMD82DZg1H6CKwwKymYG t0VTWA6AzJZaCEhqY/1G0T17nkSuSn4Ce6kceqnX6+SmGTS2pDlgdBm5XbDZa+aPaMbQ70gnYUOp5 oVmvzrFh9yHw5odv4rE+I2ad4X+s+XXu7dIGRcB87nkMJdxxyD+YCz4fYtxeqb/1fG+GGUVzrVpCZ 0uNOOnSQ==; Received: from [2a01:e34:ec5d:a741:8a4c:7c4e:dc4c:1787] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1otrE5-00AbQy-GS; Sat, 12 Nov 2022 15:11:17 +0100 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.96) (envelope-from ) id 1otrE4-00FxDe-2G; Sat, 12 Nov 2022 15:11:16 +0100 From: Aurelien Jarno To: Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Lin Jinhan Cc: linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list), Aurelien Jarno Subject: [PATCH v1 0/3] hwrng: add hwrng support for Rockchip RK3568 Date: Sat, 12 Nov 2022 15:10:56 +0100 Message-Id: <20221112141059.3802506-1-aurelien@aurel32.net> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Rockchip SoCs used to have a random number generator as part of their crypto device, and support for it has to be added to the corresponding driver. However newer Rockchip SoCs like the RK3568 have an independent True Random Number Generator device. This patchset adds a driver for it and enable it in the device tree. Aurelien Jarno (3): dt-bindings: RNG: Add Rockchip RNG bindings hwrng: add Rockchip SoC hwrng driver arm64: dts: rockchip: add DT entry for RNG to RK356x .../devicetree/bindings/rng/rockchip-rng.yaml | 62 +++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 + drivers/char/hw_random/Kconfig | 14 + drivers/char/hw_random/Makefile | 1 + drivers/char/hw_random/rockchip-rng.c | 251 ++++++++++++++++++ 5 files changed, 337 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/rockchip-rng.yaml create mode 100644 drivers/char/hw_random/rockchip-rng.c