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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id x28-20020a056512131c00b004b549ad99adsm2297725lfu.304.2023.01.10.11.19.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 11:19:33 -0800 (PST) From: Linus Walleij Subject: [PATCH v2 0/6] crypto: stm32 hash - reuse for Ux500 Date: Tue, 10 Jan 2023 20:19:12 +0100 Message-Id: <20221227-ux500-stm32-hash-v2-0-bc443bc44ca4@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIADC6vWMC/32OQQ6CMBREr0K6tqb9IIgr72FYlPKhTbQl/ZVAC He3oGuXbzIvMysjDBaJ3bKVBZwsWe8SwClj2ig3ILddYgYCQAJU/D1fhOAUXzlwo8jwGhHKa15A DT1LWqsIeRuU02YXv/2IFH+SDsu498aAvZ2P6UeT2FiKPizHk0nu6Z/RSXLB2zKvlC50p4S8P61 TwZ99GFizbdsHIyAPqtkAAAA= To: Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Maxime Coquelin , Alexandre Torgue , Lionel Debieve Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linus Walleij X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org By taking some small portions of the Ux500 HASH driver and adding to the STM32 driver, it turns out we can support both platforms with the more modern STM32 driver. The STM32 driver is more modern and compact thanks to using things like the crypto engine. We add a polled mode since the Ux500 does not have any interrupt. Incidentally, this could perhaps be re-used to implement synchronous mode, if this is desireable. To: Herbert Xu To: "David S. Miller" To: Rob Herring To: Krzysztof Kozlowski To: Maxime Coquelin To: Alexandre Torgue To: Lionel Debieve Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Linus Walleij --- Changes in v2: - Use an else-clause in the DT bindings. - Fix up issues pointed out by Lionel in the driver extension. - Dropped the patch converting dma_mode to a bool after Lionel explained how this works. - Link to v1: https://lore.kernel.org/r/20221227-ux500-stm32-hash-v1-0-b637ac4cda01@linaro.org --- Linus Walleij (6): dt-bindings: crypto: Let STM32 define Ux500 HASH crypto: stm32/hash: Simplify code crypto: stm32/hash: Use existing busy poll function crypto: stm32/hash: Wait for idle before final CPU xmit crypto: stm32/hash: Support Ux500 hash crypto: ux500/hash - delete driver .../devicetree/bindings/crypto/st,stm32-hash.yaml | 23 +- drivers/crypto/Kconfig | 10 - drivers/crypto/Makefile | 1 - drivers/crypto/stm32/stm32-hash.c | 243 ++- drivers/crypto/ux500/Kconfig | 22 - drivers/crypto/ux500/Makefile | 7 - drivers/crypto/ux500/hash/Makefile | 11 - drivers/crypto/ux500/hash/hash_alg.h | 398 ---- drivers/crypto/ux500/hash/hash_core.c | 1966 -------------------- 9 files changed, 227 insertions(+), 2454 deletions(-) --- base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2 change-id: 20221227-ux500-stm32-hash-9ee26834292f Best regards,