From patchwork Mon Apr 3 20:05:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 669876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 921B1C77B62 for ; Mon, 3 Apr 2023 20:05:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232782AbjDCUFl (ORCPT ); Mon, 3 Apr 2023 16:05:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232095AbjDCUFk (ORCPT ); Mon, 3 Apr 2023 16:05:40 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCA6D30FC for ; Mon, 3 Apr 2023 13:05:37 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id d17so30563468wrb.11 for ; Mon, 03 Apr 2023 13:05:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680552336; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=ypjGSD9MoiyC/BSmZV4rpdSicxantTDyraV9ZwR3Wko=; b=HUKwUP5VZRNpodrnPPM3ifw1bAJa/1Pwl19tZY0gZTDQdqvslDjrKagBUWgrt8/NY1 iJ2tN7m+ZqpRE+cPJMdWcNCThCpokwmT7wlwclKRVO8wDwCdc/pV4pkMjvEhq5no8djC kPGn53hin1pRv+iB8fzqU95rfylIHRDYJ0C5vDUFdDcMnNXlFDzMODxFRuRHDnhIfDgD CXJ6y6TnYjCZVy6iOCDFQph/FZRUWWpdmfYk6xaMyt1+X7y038/HXHZtZNOQxDMfQztv 7Znx05mTUxZUmAcoNI+qMtJA3exG/ecL3Ah/qeCHRICM69kcalZ0fIqnlwgmhR9/jGmJ RS1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680552336; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ypjGSD9MoiyC/BSmZV4rpdSicxantTDyraV9ZwR3Wko=; b=7wbs6ed+9FzT7OlhSDPUnRm+NgWz17kkascMxN27fhQOcX15ddsw+ScEF3RrKd9RM5 +JjGIqkqIJKSps48PdF0me97AtNgG1V8Kq6K7lp2T66RK6bKclI+dt/CR/otJmN46C9f NdrXiS6k7PATKGDNugr19t6ulIAPp6bglMJ9xngbuAikA687wbStT+0SMmJqll8eC/T8 lvMgFQdjBR3ysa5npCt7QhvngNCH+LK6q3Bkf0m0A2NElBYorEgi4qUgoK2EembbHqfk dgrX4FZykfe5TML7Qr/RTlB+DHwM+Uvcu344pz/0HgGvcADE8qNCJaE0G6Cf0YZ2mT5B 48rg== X-Gm-Message-State: AAQBX9d7vPU9utEdEbko8/L1Of/nwzmPbb1C6amRYdqo6SVMJkZm19bv WCyalvqHyk1Y5pIZ+J1ZdOZ6TA== X-Google-Smtp-Source: AKy350Ykoxehj3xlHAZUYS0YuJeY0lOEIiHNddtOkaPl+8pQTa1wGWFgeMQoaWYcLwn59zlnlqdkXg== X-Received: by 2002:adf:dbcf:0:b0:2ce:da65:1e1d with SMTP id e15-20020adfdbcf000000b002ceda651e1dmr14024101wrj.24.1680552336280; Mon, 03 Apr 2023 13:05:36 -0700 (PDT) Received: from localhost.localdomain ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id iv19-20020a05600c549300b003ef69873cf1sm20798037wmb.40.2023.04.03.13.05.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Apr 2023 13:05:35 -0700 (PDT) From: Abel Vesa To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , Adrian Hunter , "James E . J . Bottomley" , "Martin K . Petersen" , Herbert Xu , "David S . Miller" , Eric Biggers Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v5 0/6] Add dedicated Qcom ICE driver Date: Mon, 3 Apr 2023 23:05:24 +0300 Message-Id: <20230403200530.2103099-1-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org As both SDCC and UFS drivers use the ICE with duplicated implementation, while none of the currently supported platforms make use concomitantly of the same ICE IP block instance, the new SM8550 allows both UFS and SDCC to do so. In order to support such scenario, there is a need for a unified implementation and a devicetree node to be shared between both types of storage devices. So lets drop the duplicate implementation of the ICE from both SDCC and UFS and make it a dedicated (soc) driver. Also, switch all UFS and SDCC devicetree nodes to use the new ICE approach. The v4 is here: https://lore.kernel.org/all/20230327134734.3256974-1-abel.vesa@linaro.org/ Changes since v4: * dropped the SDHCI dt-bindings patch as it will be added along with the first use of qcom,ice property from an SDHCI DT node See each individual patch for changelogs. Abel Vesa (6): dt-bindings: crypto: Add Qualcomm Inline Crypto Engine dt-bindings: ufs: qcom: Add ICE phandle soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver scsi: ufs: ufs-qcom: Switch to the new ICE API mmc: sdhci-msm: Switch to the new ICE API arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node .../crypto/qcom,inline-crypto-engine.yaml | 42 ++ .../devicetree/bindings/ufs/qcom,ufs.yaml | 19 + arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 + drivers/mmc/host/Kconfig | 2 +- drivers/mmc/host/sdhci-msm.c | 220 +++-------- drivers/soc/qcom/Kconfig | 4 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/ice.c | 365 ++++++++++++++++++ drivers/ufs/host/Kconfig | 2 +- drivers/ufs/host/Makefile | 4 +- drivers/ufs/host/ufs-qcom-ice.c | 244 ------------ drivers/ufs/host/ufs-qcom.c | 97 ++++- drivers/ufs/host/ufs-qcom.h | 32 +- include/soc/qcom/ice.h | 37 ++ 14 files changed, 626 insertions(+), 453 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml create mode 100644 drivers/soc/qcom/ice.c delete mode 100644 drivers/ufs/host/ufs-qcom-ice.c create mode 100644 include/soc/qcom/ice.h