diff mbox series

[20/31] crypto: qat - replace constant masks with GENMASK

Message ID 20201012203847.340030-21-giovanni.cabiddu@intel.com
State Accepted
Commit fe779a46e85fa4433c650c8698065ea6f715cdba
Headers show
Series crypto: qat - rework in preparation for qat_4xxx driver | expand

Commit Message

Cabiddu, Giovanni Oct. 12, 2020, 8:38 p.m. UTC 
Replace constant 0xFFFFFFFFFFFFFFFFULL with GENMASK_ULL(63, 0) and
0xFFFFFFFF with GENMASK(31, 0) as they are masks.
This makes code less error prone.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/crypto/qat/qat_common/adf_gen2_hw_data.h | 2 +-
 drivers/crypto/qat/qat_common/adf_sriov.c        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
index 212ff395201f..04236a442f3c 100644
--- a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
+++ b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
@@ -24,7 +24,7 @@ 
 #define ADF_RING_BUNDLE_SIZE		0x1000
 
 #define BUILD_RING_BASE_ADDR(addr, size) \
-	(((addr) >> 6) & (0xFFFFFFFFFFFFFFFFULL << (size)))
+	(((addr) >> 6) & (GENMASK_ULL(63, 0) << (size)))
 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \
 	ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
 		   ADF_RING_CSR_RING_HEAD + ((ring) << 2))
diff --git a/drivers/crypto/qat/qat_common/adf_sriov.c b/drivers/crypto/qat/qat_common/adf_sriov.c
index dde6c57ef15a..0e8eab057d2d 100644
--- a/drivers/crypto/qat/qat_common/adf_sriov.c
+++ b/drivers/crypto/qat/qat_common/adf_sriov.c
@@ -99,7 +99,7 @@  void adf_disable_sriov(struct adf_accel_dev *accel_dev)
 	pci_disable_sriov(accel_to_pci_dev(accel_dev));
 
 	/* Disable VF to PF interrupts */
-	adf_disable_vf2pf_interrupts(accel_dev, 0xFFFFFFFF);
+	adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0));
 
 	/* Clear Valid bits in AE Thread to PCIe Function Mapping */
 	hw_data->configure_iov_threads(accel_dev, false);