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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id r27-20020a2eb61b000000b0025e739cd9a7sm1747902ljn.101.2022.08.16.07.03.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 07:03:32 -0700 (PDT) From: Linus Walleij To: linux-crypto@vger.kernel.org, Herbert Xu , "David S . Miller" Cc: phone-devel@vger.kernel.org, Stefan Hansson , Linus Walleij Subject: [PATCH v3 16/16] crypto: ux500/hash: Use accelerated noinc MMIO Date: Tue, 16 Aug 2022 16:00:49 +0200 Message-Id: <20220816140049.102306-17-linus.walleij@linaro.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220816140049.102306-1-linus.walleij@linaro.org> References: <20220816140049.102306-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org After fixes to regmap we can use accelerated MMIO access to quickly fill up the hash with new data. Signed-off-by: Linus Walleij --- ChangeLog v1->v3: - New patch based on v6.0-rc1 --- drivers/crypto/ux500/hash/hash_core.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c index be703fe4d0ec..aa91bfecba15 100644 --- a/drivers/crypto/ux500/hash/hash_core.c +++ b/drivers/crypto/ux500/hash/hash_core.c @@ -256,18 +256,13 @@ static void hash_fill_din(struct hash_device_data *device_data, const void *data, unsigned int len) { const u8 *datap = data; + int evenbytes = (len / 4) * 4; u32 val; - /* - * We cannot use regmap_write_noinc() because regmap MMIO does - * not support the noinc operations (requires .write() callback). - * TODO: revisit when regmap MMIO supports regmap_write_noinc(). - */ - while (len > 4) { - val = *((u32 *)datap); - regmap_write(device_data->map, UX500_HASH_DIN, val); - datap += 4; - len -= 4; + if (evenbytes) { + regmap_noinc_write(device_data->map, UX500_HASH_DIN, + data, evenbytes); + len -= evenbytes; } if (len) { @@ -1472,6 +1467,7 @@ static bool ux500_hash_reg_volatile(struct device *dev, unsigned int reg) { switch (reg) { case UX500_HASH_CR: + case UX500_HASH_DIN: case UX500_HASH_STR: case UX500_HASH_H(0) ... UX500_HASH_H(7): case UX500_HASH_ITCR: