diff mbox series

[v10,45/50] iommu/amd: Report all cases inhibiting SNP enablement

Message ID 20231016132819.1002933-46-michael.roth@amd.com
State New
Headers show
Series Add AMD Secure Nested Paging (SEV-SNP) Hypervisor Support | expand

Commit Message

Michael Roth Oct. 16, 2023, 1:28 p.m. UTC 
Enabling SNP relies on various IOMMU-related checks in
amd_iommu_snp_enable(). In most cases, when the host supports SNP, any
IOMMU-related details that prevent enabling SNP are reported. One case
where it is not reported is when the IOMMU doesn't support the SNP
feature. Often this is the result of the corresponding BIOS option not
being enabled, so report that case along with the others.

While here, fix up the reporting to be more consistent about using
periods to end sentences, and always printing a newline afterward.

Signed-off-by: Michael Roth <michael.roth@amd.com>
---
 drivers/iommu/amd/init.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 6af208a4f66b..121092f0a48a 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -3811,7 +3811,7 @@  int amd_iommu_snp_enable(void)
 	 * not configured in the passthrough mode.
 	 */
 	if (no_iommu || iommu_default_passthrough()) {
-		pr_err("SNP: IOMMU is disabled or configured in passthrough mode, SNP cannot be supported");
+		pr_err("SNP: IOMMU is disabled or configured in passthrough mode, SNP cannot be supported.\n");
 		return -EINVAL;
 	}
 
@@ -3826,14 +3826,16 @@  int amd_iommu_snp_enable(void)
 	}
 
 	amd_iommu_snp_en = check_feature_on_all_iommus(FEATURE_SNP);
-	if (!amd_iommu_snp_en)
+	if (!amd_iommu_snp_en) {
+		pr_err("SNP: IOMMU SNP feature is not enabled, SNP cannot be supported.\n");
 		return -EINVAL;
+	}
 
 	pr_info("SNP enabled\n");
 
 	/* Enforce IOMMU v1 pagetable when SNP is enabled. */
 	if (amd_iommu_pgtable != AMD_IOMMU_V1) {
-		pr_warn("Force to using AMD IOMMU v1 page table due to SNP\n");
+		pr_warn("Force to using AMD IOMMU v1 page table due to SNP.\n");
 		amd_iommu_pgtable = AMD_IOMMU_V1;
 	}