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Mon, 12 May 2025 05:06:01 -0700 (PDT) From: Linus Walleij Date: Mon, 12 May 2025 14:05:55 +0200 Subject: [PATCH v3 09/12] ARM64: dts: bcm4908: Add BCMBCA peripherals Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250512-bcmbca-peripherals-arm-v3-9-86f97ab4326f@linaro.org> References: <20250512-bcmbca-peripherals-arm-v3-0-86f97ab4326f@linaro.org> In-Reply-To: <20250512-bcmbca-peripherals-arm-v3-0-86f97ab4326f@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Olivia Mackall , Ray Jui , Scott Branden , Florian Fainelli Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, Linus Walleij X-Mailer: b4 0.14.2 All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. ARM64 SoCs have additional peripherals at 0xff858000, we extend the peripheral bus range to 0x400000 to cover this area. Add the watchdog, remaining GPIO blocks, RNG, and DMA blocks for the BCM4908 based on the vendor files 4908_map_part.h and 4908_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 320 possible GPIOs due to having 10 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij --- arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 116 ++++++++++++++++++++++- 1 file changed, 113 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi index 613ba7ee43d6489ea0f1490d2fccaf90961b2694..3b7595fd4e81d150278816bbe27e08286cde2ff8 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi @@ -323,11 +323,12 @@ pmb: power-controller@2800c0 { }; }; + /* PERF Peripherals */ bus@ff800000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00 0x00 0xff800000 0x3000>; + ranges = <0x00 0x00 0xff800000 0x400000>; twd: timer-mfd@400 { compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; @@ -348,13 +349,103 @@ watchdog@28 { }; }; - gpio0: gpio-controller@500 { + /* GPIOs 0 .. 31 */ + gpio0: gpio@500 { compatible = "brcm,bcm6345-gpio"; + reg = <0x500 0x04>, <0x528 0x04>; reg-names = "dirout", "dat"; - reg = <0x500 0x28>, <0x528 0x28>; + gpio-controller; + #gpio-cells = <2>; + }; + + /* GPIOs 32 .. 63 */ + gpio1: gpio@504 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x504 0x04>, <0x52c 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 64 .. 95 */ + gpio2: gpio@508 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x508 0x04>, <0x530 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + /* GPIOs 96 .. 127 */ + gpio3: gpio@50c { + compatible = "brcm,bcm6345-gpio"; + reg = <0x50c 0x04>, <0x534 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 128 .. 159 */ + gpio4: gpio@510 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x510 0x04>, <0x538 0x04>; + reg-names = "dirout", "dat"; gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 160 .. 191 */ + gpio5: gpio@514 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x514 0x04>, <0x53c 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 192 .. 223 */ + gpio6: gpio@518 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x518 0x04>, <0x540 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 224 .. 255 */ + gpio7: gpio@51c { + compatible = "brcm,bcm6345-gpio"; + reg = <0x51c 0x04>, <0x544 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 256 .. 287 */ + gpio8: gpio@520 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x520 0x04>, <0x548 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* GPIOs 288 .. 319 */ + gpio9: gpio@524 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x524 0x04>, <0x54c 0x04>; + reg-names = "dirout", "dat"; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; }; pinctrl@560 { @@ -584,6 +675,12 @@ leds: leds@800 { #size-cells = <0>; }; + rng@b80 { + compatible = "brcm,iproc-rng200"; + reg = <0xb80 0x28>; + interrupts = ; + }; + hsspi: spi@1000 { #address-cells = <1>; #size-cells = <0>; @@ -636,6 +733,19 @@ reset-controller@2644 { #reset-cells = <1>; }; }; + + pl081_dma: dma-controller@59000 { + compatible = "arm,pl081", "arm,primecell"; + // The magic B105F00D info is missing + arm,primecell-periphid = <0x00041081>; + reg = <0x59000 0x1000>; + interrupts = ; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + clocks = <&periph_clk>; + clock-names = "apb_pclk"; + #dma-cells = <2>; + }; }; reboot {