| Message ID | 20250609045110.1786634-2-h.jain@amd.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Versal TRNG driver | expand |
On Mon, 09 Jun 2025 10:21:05 +0530, Harsh Jain wrote: > From: Mounika Botcha <mounika.botcha@amd.com> > > Add TRNG node compatible string and reg properities. > > Signed-off-by: Mounika Botcha <mounika.botcha@amd.com> > Signed-off-by: Harsh Jain <h.jain@amd.com> > --- > .../bindings/crypto/xlnx,versal-trng.yaml | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename $id: http://devicetree.org/schemas/crypto/xlnx,versal-rng.yaml file: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250609045110.1786634-2-h.jain@amd.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Mon, Jun 09, 2025 at 10:21:05AM +0530, Harsh Jain wrote: > From: Mounika Botcha <mounika.botcha@amd.com> > > Add TRNG node compatible string and reg properities. > > Signed-off-by: Mounika Botcha <mounika.botcha@amd.com> > Signed-off-by: Harsh Jain <h.jain@amd.com> > --- > .../bindings/crypto/xlnx,versal-trng.yaml | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > new file mode 100644 > index 000000000000..b6424eeb5966 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > @@ -0,0 +1,36 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/xlnx,versal-rng.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx Versal True Random Number Generator Hardware Accelerator > + > +maintainers: > + - Harsh Jain <h.jain@amd.com> > + - Mounika Botcha <mounika.botcha@amd.com> > + > +description: > + The Versal True Random Number Generator consists of Ring Oscillators as > + entropy source and a deterministic CTR_DRBG random bit generator (DRBG). > + > +properties: > + compatible: > + const: xlnx,versal-rng I believe the prior comment was only about the node name. If the block is called 'trng' then you should call it that. And please test your bindings before sending. Rob
[AMD Official Use Only - AMD Internal Distribution Only] > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: Monday, June 9, 2025 6:45 PM > To: Jain, Harsh (AECG-SSW) <h.jain@amd.com> > Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux- > crypto@vger.kernel.org; devicetree@vger.kernel.org; Botcha, Mounika > <Mounika.Botcha@amd.com>; Savitala, Sarat Chand > <sarat.chand.savitala@amd.com>; Dhanawade, Mohan > <mohan.dhanawade@amd.com>; Simek, Michal <michal.simek@amd.com> > Subject: Re: [PATCH v2 1/6] dt-bindings: crypto: Add node for True Random > Number Generator > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > On Mon, Jun 09, 2025 at 10:21:05AM +0530, Harsh Jain wrote: > > From: Mounika Botcha <mounika.botcha@amd.com> > > > > Add TRNG node compatible string and reg properities. > > > > Signed-off-by: Mounika Botcha <mounika.botcha@amd.com> > > Signed-off-by: Harsh Jain <h.jain@amd.com> > > --- > > .../bindings/crypto/xlnx,versal-trng.yaml | 36 +++++++++++++++++++ > > 1 file changed, 36 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,versal- > trng.yaml > > > > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > > new file mode 100644 > > index 000000000000..b6424eeb5966 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > > @@ -0,0 +1,36 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/crypto/xlnx,versal-rng.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Xilinx Versal True Random Number Generator Hardware Accelerator > > + > > +maintainers: > > + - Harsh Jain <h.jain@amd.com> > > + - Mounika Botcha <mounika.botcha@amd.com> > > + > > +description: > > + The Versal True Random Number Generator consists of Ring Oscillators as > > + entropy source and a deterministic CTR_DRBG random bit generator (DRBG). > > + > > +properties: > > + compatible: > > + const: xlnx,versal-rng > > I believe the prior comment was only about the node name. If the block > is called 'trng' then you should call it that. > > And please test your bindings before sending. Thanks Rob, Will fix and test. > > Rob
diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml new file mode 100644 index 000000000000..b6424eeb5966 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/xlnx,versal-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal True Random Number Generator Hardware Accelerator + +maintainers: + - Harsh Jain <h.jain@amd.com> + - Mounika Botcha <mounika.botcha@amd.com> + +description: + The Versal True Random Number Generator consists of Ring Oscillators as + entropy source and a deterministic CTR_DRBG random bit generator (DRBG). + +properties: + compatible: + const: xlnx,versal-rng + + reg: + maxItems: 1 + +required: + - reg + +additionalProperties: false + +examples: + - | + rng@f1230000 { + compatible = "xlnx,versal-rng"; + reg = <0xf1230000 0x1000>; + }; +... +