From patchwork Wed Oct 9 08:38:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herbert Xu X-Patchwork-Id: 834152 Received: from abb.hmeau.com (abb.hmeau.com [144.6.53.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75D8718A6D2; Wed, 9 Oct 2024 08:38:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=144.6.53.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728463135; cv=none; b=qUBplIhxQpvvrFz4dGfqRgarEUQGCmbQu5T9tOXLWjB1NyC+44W7Sb5Ma8h7W6KaSq8ltMH+/WkuraIfJ/VsDgBJKCDJkcNsC/ZLCvBq9fsjE4Wl/EqDfwa/qO/lAKfEqj+c7XJwwZD2e3MHFis0ZXUEI3BWMC1v46j1UwZHrRc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728463135; c=relaxed/simple; bh=heE+rk8jj7XkbP7XKjDgyQ90lrlfZRske+NjiKTVYus=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=PdUhcTS+yxTJIVEowt/8+j9slDYQhqHnqRArPZCVm/p9eEC4K7UU+I5eiOrNPbPwhXZnpCYA405Pq9OQvKBVpoqg9UKJgyyju1w64TtEfl3jtKjNtCYyJDH8l+t1v6IRhqHg4hlrEt1fzXuWqvq23NAWF1dFGvgSotgY8zsIE7g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=gondor.apana.org.au; spf=pass smtp.mailfrom=gondor.apana.org.au; dkim=pass (2048-bit key) header.d=hmeau.com header.i=@hmeau.com header.b=eWenvMHg; arc=none smtp.client-ip=144.6.53.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=gondor.apana.org.au Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gondor.apana.org.au Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=hmeau.com header.i=@hmeau.com header.b="eWenvMHg" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=hmeau.com; s=formenos; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=917JxrPMGHqjjHSTpuJkH+wZkt5YK1ZoiG/7Gvwxp2g=; b=eWenvMHgUh4s+kG5mCmNeOY6aF 5fjRY+exA3GOMu7e872Yb0RlPZnQbWlKH3st9z+Wq1ouUssvmAFglAvJuHT0LfkTKMTiGMhcN4Z3P jcwt9XJ4I92Nf+G5SubnRhZioWN1un4FH3012pT1ifgLQ9oGNhCvO2Mz9U/bzfxsRA7GChm5ev4Cv vI3mVUsMyRUkaK+GMx3k1tNEqKR5IAoZ2ibYSBfRDbMXFXK44uhx+v66FMwx5AC2jFAEJW+4YnIky UU8Pk5rZKUUAADLvZolL5z9VcWSioLbkvbOPZ9NUt/T3MeDZroJktaZrnAhP9Gk5DBrtAPM2KySHx +utHpt9Q==; Received: from loth.rohan.me.apana.org.au ([192.168.167.2]) by formenos.hmeau.com with smtp (Exim 4.96 #2 (Debian)) id 1syS3f-007yf5-0A; Wed, 09 Oct 2024 16:38:49 +0800 Received: by loth.rohan.me.apana.org.au (sSMTP sendmail emulation); Wed, 09 Oct 2024 16:38:48 +0800 Date: Wed, 9 Oct 2024 16:38:48 +0800 From: Herbert Xu To: Klaus Kudielka Cc: regressions@lists.linux.dev, linux-kernel@vger.kernel.org, Linux Crypto Mailing List , Boris Brezillon , Arnaud Ebalard Subject: [PATCH] crypto: marvell/cesa - Disable hash algorithms Message-ID: References: <1fc4db6269245de4c626f029a46efef246ee7232.camel@gmail.com> <38a275a4e0224266ceb9ce822e3860fe9209d50c.camel@gmail.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Disable cesa hash algorithms by lowering the priority because they appear to be broken when invoked in parallel. This allows them to still be tested for debugging purposes. Reported-by: Klaus Kudielka Signed-off-by: Herbert Xu diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c index 8d84ad45571c..f150861ceaf6 100644 --- a/drivers/crypto/marvell/cesa/hash.c +++ b/drivers/crypto/marvell/cesa/hash.c @@ -947,7 +947,7 @@ struct ahash_alg mv_md5_alg = { .base = { .cra_name = "md5", .cra_driver_name = "mv-md5", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1018,7 +1018,7 @@ struct ahash_alg mv_sha1_alg = { .base = { .cra_name = "sha1", .cra_driver_name = "mv-sha1", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1092,7 +1092,7 @@ struct ahash_alg mv_sha256_alg = { .base = { .cra_name = "sha256", .cra_driver_name = "mv-sha256", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1302,7 +1302,7 @@ struct ahash_alg mv_ahmac_md5_alg = { .base = { .cra_name = "hmac(md5)", .cra_driver_name = "mv-hmac-md5", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1373,7 +1373,7 @@ struct ahash_alg mv_ahmac_sha1_alg = { .base = { .cra_name = "hmac(sha1)", .cra_driver_name = "mv-hmac-sha1", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1444,7 +1444,7 @@ struct ahash_alg mv_ahmac_sha256_alg = { .base = { .cra_name = "hmac(sha256)", .cra_driver_name = "mv-hmac-sha256", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY,