From patchwork Wed Feb 19 21:32:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 204578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23E40C34022 for ; Wed, 19 Feb 2020 21:33:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ECF9524656 for ; Wed, 19 Feb 2020 21:33:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="ME+SI2nb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727637AbgBSVdM (ORCPT ); Wed, 19 Feb 2020 16:33:12 -0500 Received: from mail27.static.mailgun.info ([104.130.122.27]:49136 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726703AbgBSVdM (ORCPT ); Wed, 19 Feb 2020 16:33:12 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1582147991; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=0JN/ehYDL0O2oEeVVUyuLdKga5FoJgnDhpfMUdo+78Q=; b=ME+SI2nbfb8VR96zLrBuX2C2hH+RAoLz3nTRg+AfYUO35aIcqSpXfkPoDZZzDLQNlgpfj+or yYOybVccfJb4b2hduGzKXYZIYqpSxgx74W7SorYXSbuKHdl3ULtGiK5pDpU9kXrl8ipO0VR0 BdaYHC6QxTTOlmH1tVRjetiXbdE= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e4da990.7f0e10e61928-smtp-out-n03; Wed, 19 Feb 2020 21:33:04 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 27E32C4479C; Wed, 19 Feb 2020 21:33:04 +0000 (UTC) Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse) by smtp.codeaurora.org (Postfix) with ESMTPSA id EC98DC43383; Wed, 19 Feb 2020 21:33:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org EC98DC43383 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: linux-arm-msm@vger.kernel.org Cc: John Stultz , Bjorn Andersson , Sean Paul , devicetree@vger.kernel.org, Stephen Boyd , Douglas Anderson , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sharat Masetty , Rob Herring , Rob Clark , David Airlie , Andy Gross , Mark Rutland , freedreno@lists.freedesktop.org, Daniel Vetter Subject: [PATCH v1 0/4] msm/gpu/a6xx: use the DMA-API for GMU memory allocations Date: Wed, 19 Feb 2020 14:32:54 -0700 Message-Id: <1582147978-31475-1-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When CONFIG_INIT_ON_ALLOC_DEFAULT_ON the GMU memory allocator runs afoul of cache coherency issues because it is mapped as write-combine without clearing the cache after it was zeroed. Rather than duplicate the hacky workaround we use in the GEM allocator for the same reason it turns out that we don't need to have a bespoke memory allocator for the GMU anyway. It uses a flat, global address space and there are only two relatively minor allocations anyway. In short, this is essentially what the DMA API was created for so replace a bunch of memory management code with two calls to allocate and free DMA memory and we're fine. The only wrinkle is that the memory allocations need to be in a very specific location in the GMU virtual address space so in order to get the iova allocator to do the right thing we need to specify the dma-ranges property in the device tree for the GMU node. Since we've not yet converted the GMU bindings over to YAML two patches quickly turn into four but at the end of it we have at least one bindings file converted to YAML and 99 less lines of code to worry about. Jordan Crouse (4): dt-bindings: display: msm: Convert GMU bindings to YAML dt-bindings: display: msm: Add required dma-range property arm64: dts: sdm845: Set the virtual address range for GMU allocations drm/msm/a6xx: Use the DMA API for GMU memory objects .../devicetree/bindings/display/msm/gmu.txt | 116 ----------------- .../devicetree/bindings/display/msm/gmu.yaml | 140 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 + drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 107 +--------------- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 5 +- 5 files changed, 149 insertions(+), 221 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/msm/gmu.txt create mode 100644 Documentation/devicetree/bindings/display/msm/gmu.yaml