[v6,0/7] Introduce SMP support for CI20 (based on JZ4780).

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Headers	show Return-Path: <SRS0=21hy=4I=vger.kernel.org=devicetree-owner@kernel.org> From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= <zhouyanjie@wanyeetech.com> To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, tglx@linutronix.de, ralf@linux-mips.org, paulburton@kernel.org, jiaxun.yang@flygoat.com, chenhc@lemote.com, sboyd@kernel.org, mturquette@baylibre.com, mark.rutland@arm.com, robh+dt@kernel.org, daniel.lezcano@linaro.org, paul@crapouillou.net, geert+renesas@glider.be, krzk@kernel.org, ebiederm@xmission.com, miquel.raynal@bootlin.com, keescook@chromium.org, sernia.zhou@foxmail.com, zhenwenjin@gmail.com, dongsheng.qiu@ingenic.com Subject: [PATCH v6 0/7] Introduce SMP support for CI20 (based on JZ4780). Date: Fri, 21 Feb 2020 00:24:42 +0800 Message-Id: <1582215889-113034-2-git-send-email-zhouyanjie@wanyeetech.com> In-Reply-To: <1582215889-113034-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1582215889-113034-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk
Series	Introduce SMP support for CI20 (based on JZ4780). \| expand [v6,0/7] Introduce SMP support for CI20 (based on JZ4780). [v6,1/7] clk: JZ4780: Add function for enable the second core. [v6,3/7] MIPS: CI20: Modify DTS to support high resolution timer for SMP. [v6,4/7] clocksource: Ingenic: Add high resolution timer support for SMP.

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Subject: [PATCH v6 0/7] Introduce SMP support for CI20 (based on JZ4780).
Date: Fri, 21 Feb 2020 00:24:42 +0800
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Introduce SMP support for CI20 (based on JZ4780). | expand

Message

Zhou Yanjie Feb. 20, 2020, 4:24 p.m. UTC

Introduce SMP support for MIPS Creator CI20, which is
based on Ingenic JZ4780 SoC.

周琰杰 (Zhou Yanjie) (7):
  clk: JZ4780: Add function for enable the second core.
  MIPS: JZ4780: Introduce SMP support.
  MIPS: CI20: Modify DTS to support high resolution timer for SMP.
  clocksource: Ingenic: Add high resolution timer support for SMP.
  dt-bindings: MIPS: Document Ingenic SoCs binding.
  MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs.
  MIPS: CI20: Update defconfig to support SMP.

 .../bindings/mips/ingenic/ingenic,cpu.yaml         |  61 +++++
 .../bindings/mips/ingenic/ingenic,soc.yaml         |  34 +++
 arch/mips/boot/dts/ingenic/ci20.dts                |  13 +-
 arch/mips/boot/dts/ingenic/jz4740.dtsi             |  14 ++
 arch/mips/boot/dts/ingenic/jz4770.dtsi             |  15 +-
 arch/mips/boot/dts/ingenic/jz4780.dtsi             |  23 ++
 arch/mips/boot/dts/ingenic/x1000.dtsi              |  14 ++
 arch/mips/configs/ci20_defconfig                   |   2 +
 arch/mips/include/asm/mach-jz4740/smp.h            |  81 +++++++
 arch/mips/jz4740/Kconfig                           |   3 +
 arch/mips/jz4740/Makefile                          |   5 +
 arch/mips/jz4740/prom.c                            |   4 +
 arch/mips/jz4740/smp-entry.S                       |  57 +++++
 arch/mips/jz4740/smp.c                             | 254 +++++++++++++++++++++
 arch/mips/kernel/idle.c                            |  36 ++-
 drivers/clk/ingenic/jz4780-cgu.c                   |  55 ++++-
 drivers/clocksource/ingenic-timer.c                | 113 +++++++--
 17 files changed, 752 insertions(+), 32 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
 create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml
 create mode 100644 arch/mips/include/asm/mach-jz4740/smp.h
 create mode 100644 arch/mips/jz4740/smp-entry.S
 create mode 100644 arch/mips/jz4740/smp.c