| Message ID | 1607746317-4696-1-git-send-email-yongqiang.niu@mediatek.com |
|---|---|
| Headers | show |
| Series | drm/mediatek: add support for mediatek SOC MT8192 | expand |
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:12寫道： > > This patch add component OVL_2L2 Break drm part and soc part into different patches. Regards, Chun-Kuang. > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 + > include/linux/soc/mediatek/mtk-mmsys.h | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > index 8eba44b..8938554 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > @@ -403,6 +403,7 @@ struct mtk_ddp_comp_match { > [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, NULL }, > [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL }, > [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, NULL }, > + [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, NULL }, > [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL }, > [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL }, > [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL }, > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > index 4b6c514..42476c2 100644 > --- a/include/linux/soc/mediatek/mtk-mmsys.h > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > @@ -29,6 +29,7 @@ enum mtk_ddp_comp_id { > DDP_COMPONENT_OVL0, > DDP_COMPONENT_OVL_2L0, > DDP_COMPONENT_OVL_2L1, > + DDP_COMPONENT_OVL_2L2, > DDP_COMPONENT_OVL1, > DDP_COMPONENT_PWM0, > DDP_COMPONENT_PWM1, > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:12寫道： > > add description for mt8192 display Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index dfbec76..b4e62ae 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -44,7 +44,7 @@ Required properties (all function blocks): > "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt > "mediatek,<chip>-disp-mutex" - display mutex > "mediatek,<chip>-disp-od" - overdrive > - the supported chips are mt2701, mt7623, mt2712, mt8173 and mt8183. > + the supported chips are mt2701, mt7623, mt2712, mt8173, mt8183 and mt8192. > - reg: Physical base address and length of the function block register space > - interrupts: The interrupt signal from the function block (required, except for > merge and split function blocks). > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:22寫道： > > add mt8192 mmsys support > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/soc/mediatek/mmsys/Makefile | 1 + > drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++++++++++++++++++++++++++++++ > include/linux/soc/mediatek/mtk-mmsys.h | 1 + > 3 files changed, 121 insertions(+) > create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c > > diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile > index 25eeb9e5..7508cd3 100644 > --- a/drivers/soc/mediatek/mmsys/Makefile > +++ b/drivers/soc/mediatek/mmsys/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0-only > obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o > obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o > +obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o > obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o > diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c > new file mode 100644 > index 0000000..79cb33f > --- /dev/null > +++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c > @@ -0,0 +1,119 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// > +// Copyright (c) 2020 MediaTek Inc. > + > +#include <linux/device.h> > +#include <linux/io.h> > +#include <linux/of_device.h> > +#include <linux/platform_device.h> > +#include <linux/soc/mediatek/mtk-mmsys.h> > + > +#define MMSYS_OVL_MOUT_EN 0xf04 > +#define DISP_OVL0_GO_BLEND BIT(0) > +#define DISP_OVL0_GO_BG BIT(1) > +#define DISP_OVL0_2L_GO_BLEND BIT(2) > +#define DISP_OVL0_2L_GO_BG BIT(3) > +#define DISP_OVL1_2L_MOUT_EN 0xf08 > +#define OVL1_2L_MOUT_EN_RDMA1 BIT(4) > +#define DISP_OVL0_2L_MOUT_EN 0xf18 > +#define DISP_OVL0_MOUT_EN 0xf1c > +#define OVL0_MOUT_EN_DISP_RDMA0 BIT(0) > +#define OVL0_MOUT_EN_OVL0_2L BIT(4) > +#define DISP_RDMA0_SEL_IN 0xf2c > +#define RDMA0_SEL_IN_OVL0_2L 0x3 > +#define DISP_RDMA0_SOUT_SEL 0xf30 > +#define RDMA0_SOUT_COLOR0 0x1 > +#define DISP_CCORR0_SOUT_SEL 0xf34 > +#define CCORR0_SOUT_AAL0 0x1 > +#define DISP_AAL0_SEL_IN 0xf38 > +#define AAL0_SEL_IN_CCORR0 0x1 > +#define DISP_DITHER0_MOUT_EN 0xf3c > +#define DITHER0_MOUT_DSI0 BIT(0) > +#define DISP_DSI0_SEL_IN 0xf40 > +#define DSI0_SEL_IN_DITHER0 0x1 > +#define DISP_OVL2_2L_MOUT_EN 0xf4c > +#define OVL2_2L_MOUT_RDMA4 BIT(0) > + > +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + unsigned int value; > + > + if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) { > + *addr = DISP_OVL0_2L_MOUT_EN; > + value = OVL0_MOUT_EN_DISP_RDMA0; > + } else if (cur == DDP_COMPONENT_OVL_2L2 && next == DDP_COMPONENT_RDMA4) { > + *addr = DISP_OVL2_2L_MOUT_EN; > + value = OVL2_2L_MOUT_RDMA4; > + } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) { > + *addr = DISP_DITHER0_MOUT_EN; > + value = DITHER0_MOUT_DSI0; > + } else { > + value = 0; > + } > + > + return value; > +} > + > +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + unsigned int value; > + > + if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) { > + *addr = DISP_RDMA0_SEL_IN; > + value = RDMA0_SEL_IN_OVL0_2L; > + } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) { > + *addr = DISP_AAL0_SEL_IN; > + value = AAL0_SEL_IN_CCORR0; > + } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) { > + *addr = DISP_DSI0_SEL_IN; > + value = DSI0_SEL_IN_DITHER0; > + } else { > + value = 0; > + } > + > + return value; > +} > + > +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs, > + enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next) > +{ > + if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) { > + writel_relaxed(RDMA0_SOUT_COLOR0, config_regs + DISP_RDMA0_SOUT_SEL); > + } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) { > + writel_relaxed(CCORR0_SOUT_AAL0, config_regs + DISP_CCORR0_SOUT_SEL); > + } > +} > + > +static unsigned int mtk_mmsys_ovl_mout_en(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + int value = -1; > + > + *addr = MMSYS_OVL_MOUT_EN; > + > + if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0) > + value = DISP_OVL0_GO_BG; > + else if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_OVL0) > + value = DISP_OVL0_2L_GO_BG; > + else if (cur == DDP_COMPONENT_OVL0) > + value = DISP_OVL0_GO_BLEND; > + else if (cur == DDP_COMPONENT_OVL_2L0) > + value = DISP_OVL0_2L_GO_BLEND; > + else > + value = -1; > + > + return value; > +} I think you should squash mtk_mmsys_ovl_mout_en() with mtk_mmsys_ddp_mout_en(). Regards, Chun-Kuang. > + > +struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs = { > + .mout_en = mtk_mmsys_ddp_mout_en, > + .ovl_mout_en = mtk_mmsys_ovl_mout_en, > + .sel_in = mtk_mmsys_ddp_sel_in, > + .sout_sel = mtk_mmsys_ddp_sout_sel, > +}; > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > index 220203d..efa07b9 100644 > --- a/include/linux/soc/mediatek/mtk-mmsys.h > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > @@ -62,6 +62,7 @@ struct mtk_mmsys_conn_funcs { > > extern struct mtk_mmsys_conn_funcs mt2701_mmsys_funcs; > extern struct mtk_mmsys_conn_funcs mt8183_mmsys_funcs; > +extern struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs; > > void mtk_mmsys_ddp_connect(struct device *dev, > enum mtk_ddp_comp_id cur, > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Mon, 2020-12-14 at 00:02 +0800, Chun-Kuang Hu wrote: > Hi, Yongqiang: > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:22寫道： > > > > add mt8192 mmsys support > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > --- > > drivers/soc/mediatek/mmsys/Makefile | 1 + > > drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++++++++++++++++++++++++++++++ > > include/linux/soc/mediatek/mtk-mmsys.h | 1 + > > 3 files changed, 121 insertions(+) > > create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c > > > > diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile > > index 25eeb9e5..7508cd3 100644 > > --- a/drivers/soc/mediatek/mmsys/Makefile > > +++ b/drivers/soc/mediatek/mmsys/Makefile > > @@ -1,4 +1,5 @@ > > # SPDX-License-Identifier: GPL-2.0-only > > obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o > > obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o > > +obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o > > obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o > > diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c > > new file mode 100644 > > index 0000000..79cb33f > > --- /dev/null > > +++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c > > @@ -0,0 +1,119 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +// > > +// Copyright (c) 2020 MediaTek Inc. > > + > > +#include <linux/device.h> > > +#include <linux/io.h> > > +#include <linux/of_device.h> > > +#include <linux/platform_device.h> > > +#include <linux/soc/mediatek/mtk-mmsys.h> > > + > > +#define MMSYS_OVL_MOUT_EN 0xf04 > > +#define DISP_OVL0_GO_BLEND BIT(0) > > +#define DISP_OVL0_GO_BG BIT(1) > > +#define DISP_OVL0_2L_GO_BLEND BIT(2) > > +#define DISP_OVL0_2L_GO_BG BIT(3) > > +#define DISP_OVL1_2L_MOUT_EN 0xf08 > > +#define OVL1_2L_MOUT_EN_RDMA1 BIT(4) > > +#define DISP_OVL0_2L_MOUT_EN 0xf18 > > +#define DISP_OVL0_MOUT_EN 0xf1c > > +#define OVL0_MOUT_EN_DISP_RDMA0 BIT(0) > > +#define OVL0_MOUT_EN_OVL0_2L BIT(4) > > +#define DISP_RDMA0_SEL_IN 0xf2c > > +#define RDMA0_SEL_IN_OVL0_2L 0x3 > > +#define DISP_RDMA0_SOUT_SEL 0xf30 > > +#define RDMA0_SOUT_COLOR0 0x1 > > +#define DISP_CCORR0_SOUT_SEL 0xf34 > > +#define CCORR0_SOUT_AAL0 0x1 > > +#define DISP_AAL0_SEL_IN 0xf38 > > +#define AAL0_SEL_IN_CCORR0 0x1 > > +#define DISP_DITHER0_MOUT_EN 0xf3c > > +#define DITHER0_MOUT_DSI0 BIT(0) > > +#define DISP_DSI0_SEL_IN 0xf40 > > +#define DSI0_SEL_IN_DITHER0 0x1 > > +#define DISP_OVL2_2L_MOUT_EN 0xf4c > > +#define OVL2_2L_MOUT_RDMA4 BIT(0) > > + > > +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur, > > + enum mtk_ddp_comp_id next, > > + unsigned int *addr) > > +{ > > + unsigned int value; > > + > > + if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) { > > + *addr = DISP_OVL0_2L_MOUT_EN; > > + value = OVL0_MOUT_EN_DISP_RDMA0; > > + } else if (cur == DDP_COMPONENT_OVL_2L2 && next == DDP_COMPONENT_RDMA4) { > > + *addr = DISP_OVL2_2L_MOUT_EN; > > + value = OVL2_2L_MOUT_RDMA4; > > + } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) { > > + *addr = DISP_DITHER0_MOUT_EN; > > + value = DITHER0_MOUT_DSI0; > > + } else { > > + value = 0; > > + } > > + > > + return value; > > +} > > + > > +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur, > > + enum mtk_ddp_comp_id next, > > + unsigned int *addr) > > +{ > > + unsigned int value; > > + > > + if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) { > > + *addr = DISP_RDMA0_SEL_IN; > > + value = RDMA0_SEL_IN_OVL0_2L; > > + } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) { > > + *addr = DISP_AAL0_SEL_IN; > > + value = AAL0_SEL_IN_CCORR0; > > + } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) { > > + *addr = DISP_DSI0_SEL_IN; > > + value = DSI0_SEL_IN_DITHER0; > > + } else { > > + value = 0; > > + } > > + > > + return value; > > +} > > + > > +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs, > > + enum mtk_ddp_comp_id cur, > > + enum mtk_ddp_comp_id next) > > +{ > > + if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_COLOR0) { > > + writel_relaxed(RDMA0_SOUT_COLOR0, config_regs + DISP_RDMA0_SOUT_SEL); > > + } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) { > > + writel_relaxed(CCORR0_SOUT_AAL0, config_regs + DISP_CCORR0_SOUT_SEL); > > + } > > +} > > + > > +static unsigned int mtk_mmsys_ovl_mout_en(enum mtk_ddp_comp_id cur, > > + enum mtk_ddp_comp_id next, > > + unsigned int *addr) > > +{ > > + int value = -1; > > + > > + *addr = MMSYS_OVL_MOUT_EN; > > + > > + if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0) > > + value = DISP_OVL0_GO_BG; > > + else if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_OVL0) > > + value = DISP_OVL0_2L_GO_BG; > > + else if (cur == DDP_COMPONENT_OVL0) > > + value = DISP_OVL0_GO_BLEND; > > + else if (cur == DDP_COMPONENT_OVL_2L0) > > + value = DISP_OVL0_2L_GO_BLEND; > > + else > > + value = -1; > > + > > + return value; > > +} > > I think you should squash mtk_mmsys_ovl_mout_en() with mtk_mmsys_ddp_mout_en(). > > Regards, > Chun-Kuang. hi in soc mt8192, ovl0_2l -> rdma0 usecase need set 2 register: DISP_OVL0_2L_MOUT_EN and MMSYS_OVL_MOUT_EN, 'if-else' in mtk_mmsys_ddp_mout_en can not cover this case. > > > + > > +struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs = { > > + .mout_en = mtk_mmsys_ddp_mout_en, > > + .ovl_mout_en = mtk_mmsys_ovl_mout_en, > > + .sel_in = mtk_mmsys_ddp_sel_in, > > + .sout_sel = mtk_mmsys_ddp_sout_sel, > > +}; > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > > index 220203d..efa07b9 100644 > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > @@ -62,6 +62,7 @@ struct mtk_mmsys_conn_funcs { > > > > extern struct mtk_mmsys_conn_funcs mt2701_mmsys_funcs; > > extern struct mtk_mmsys_conn_funcs mt8183_mmsys_funcs; > > +extern struct mtk_mmsys_conn_funcs mt8192_mmsys_funcs; > > > > void mtk_mmsys_ddp_connect(struct device *dev, > > enum mtk_ddp_comp_id cur, > > -- > > 1.8.1.1.dirty > > _______________________________________________ > > Linux-mediatek mailing list > > Linux-mediatek@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Sun, 2020-12-13 at 09:15 +0800, Chun-Kuang Hu wrote: > Hi, Yongqiang: > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月12日 週六 下午12:12寫道： > > > > This patch add component OVL_2L2 > > Break drm part and soc part into different patches. > > Regards, > Chun-Kuang. will be fixed in next version > > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 + > > include/linux/soc/mediatek/mtk-mmsys.h | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > index 8eba44b..8938554 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > @@ -403,6 +403,7 @@ struct mtk_ddp_comp_match { > > [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, NULL }, > > [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL }, > > [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, NULL }, > > + [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, NULL }, > > [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL }, > > [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL }, > > [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL }, > > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > > index 4b6c514..42476c2 100644 > > --- a/include/linux/soc/mediatek/mtk-mmsys.h > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > > @@ -29,6 +29,7 @@ enum mtk_ddp_comp_id { > > DDP_COMPONENT_OVL0, > > DDP_COMPONENT_OVL_2L0, > > DDP_COMPONENT_OVL_2L1, > > + DDP_COMPONENT_OVL_2L2, > > DDP_COMPONENT_OVL1, > > DDP_COMPONENT_PWM0, > > DDP_COMPONENT_PWM1, > > -- > > 1.8.1.1.dirty > > _______________________________________________ > > Linux-mediatek mailing list > > Linux-mediatek@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
This series are based on 5.10-rc1 and provid 17 patch to support mediatek SOC MT8192 Changes in v2: - base mmsys https://patchwork.kernel.org/project/linux-mediatek/cover/1607506379-10998-1-git-send-email-yongqiang.niu@mediatek.com/ - base mt8192 gce dtbinding file https://patchwork.kernel.org/project/linux-mediatek/patch/1607141728-17307-2-git-send-email-yongqiang.niu@mediatek.com/ - add dt-bindings description for post mask - add dt-bindings description for mt8192 display - fix some comment in v1 - add mt8192 mmsys function call Changes in v1: - add some more ddp component - add mt8192 mmsys support - add ovl mount on support - add 2 more clock into mutex device - fix ovl smi_id_en and fb null software bug - fix ddp compoent size config bug - add mt8192 drm support - add ddp bypass shadow register function - add 8192 dts description Yongqiang Niu (17): dt-bindings: mediatek: add description for postmask dt-bindings: mediatek: add CLK_MM_DISP_CONFIG control description for mt8192 display dt-bindings: mediatek: add description for mt8192 display drm/mediatek: add component OVL_2L2 drm/mediatek: add component POSTMASK drm/mediatek: add component RDMA4 drm/mediatek: add disp config and mm 26mhz clock into mutex device drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase drm/mediatek: check if fb is null drm/mediatek: fix aal size config drm/mediatek: fix dither size config drm/mediatek: fix gamma size config drm/mediatek: fix ccorr size config soc: mediatek: mmsys: Use function call for setting mmsys ovl mout register soc: mediatek: mmsys: add mt8192 mmsys support drm/mediatek: add support for mediatek SOC MT8192 arm64: dts: mt8192: add display node .../bindings/display/mediatek/mediatek,disp.txt | 6 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 130 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_disp_color.c | 6 + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 34 +++++- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 84 +++++++++++-- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 50 +++++++- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 48 ++++++++ drivers/soc/mediatek/mmsys/Makefile | 1 + drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 +++++++++++++++++++ drivers/soc/mediatek/mmsys/mtk-mmsys.c | 18 +++ include/linux/soc/mediatek/mtk-mmsys.h | 7 ++ 13 files changed, 496 insertions(+), 14 deletions(-) create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c