From patchwork Sat Aug 28 10:50:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kewei Xu X-Patchwork-Id: 503843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98F52C4320A for ; Sat, 28 Aug 2021 10:51:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7FA8460EE5 for ; Sat, 28 Aug 2021 10:51:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233904AbhH1KwM (ORCPT ); Sat, 28 Aug 2021 06:52:12 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:33164 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234005AbhH1KwD (ORCPT ); Sat, 28 Aug 2021 06:52:03 -0400 X-UUID: 347127cbbc55421bb26c313caeabaa0f-20210828 X-UUID: 347127cbbc55421bb26c313caeabaa0f-20210828 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 993094991; Sat, 28 Aug 2021 18:51:10 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 28 Aug 2021 18:51:08 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 28 Aug 2021 18:51:07 +0800 From: Kewei Xu To: CC: , , , , , , , , , , , , , , Subject: [PATCH v6 0/7] Introducing an attribute to select the time setting Date: Sat, 28 Aug 2021 18:50:52 +0800 Message-ID: <1630147859-17031-1-git-send-email-kewei.xu@mediatek.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org v6: Add the judgment condition, clear the handshake signal between dma and i2c when multiple msgs are transmitted. v5: 1. Replace the previous variable name "default_timing_adjust" with "use-default-timing" 2. Added waiting for dma reset mechanism 3. Remove received patch(dt-bindings: i2c: update bindings for MT8195 SOC) v4: 1. Remove the repeated assignment of the inter_clk_div parameter 2. Modify the wrong assignment of OFFSET_MULTI_DMA 3. Unify the log print format of the i2c_dump_register() and drop the extra outer parentheses 4. Place the fixes at the very least 5. Add fixed tags 25708278f810 ("i2c: mediatek: Add i2c support for MediaTek MT8183") 6. Add "i2c: mediatek: modify bus speed calculation formula" 7. Fix single line characters exceeding 80 characters 8. Combine two different series of patches. v3: 1. Fix code errors caused by v2 modification v2: 1. Add "dt-bindings: i2c: add attribute default-timing-adjust" 2. Split the fix into sepatate patch. Kewei Xu (7): i2c: mediatek: fixing the incorrect register offset i2c: mediatek: Reset the handshake signal between i2c and dma i2c: mediatek: Dump i2c/dma register when a timeout occurs dt-bindings: i2c: add attribute use-default-timing i2c: mediatek: Add OFFSET_EXT_CONF setting back i2c: mediatek: Isolate speed setting via dts for special devices i2c: mediatek: modify bus speed calculation formula .../devicetree/bindings/i2c/i2c-mt65xx.txt | 2 + drivers/i2c/busses/i2c-mt65xx.c | 207 ++++++++++++++++-- 2 files changed, 192 insertions(+), 17 deletions(-) Reviewed-by: Qii Wang Reviewed-by: Qii Wang