| Message ID | 20191202182205.14629-1-afaerber@suse.de |
|---|---|
| Headers | show |
| Series | ARM: dts: realtek: Introduce syscon | expand |
Hi James, Am 02.12.19 um 19:21 schrieb Andreas Färber: > This patch series factors out system controller multi-function device nodes > for CRT, Iso, Misc, SB2 and SCPU Wrapper IP blocks. > > It was inspired by my SoC info RFC, as discussed in its cover letter [1]. > > Goal of DT is to describe the hardware, and in previous patches we've already > introduced Realtek's r-bus as node layer. The next step here is to model > multi-function blocks as nodes. In order to cope with 80-character line limit, > child nodes are added via reference rather than in-place. I'm waiting for your Acked-by of the blocks & numbers in these patches. Other Realtek engineers are also invited to respond, of course. Thanks in advance, Andreas > Andreas Färber (14): > ARM: dts: rtd1195: Introduce iso and misc syscon > arm64: dts: realtek: rtd129x: Introduce CRT, iso and misc syscon > arm64: dts: realtek: rtd139x: Introduce CRT, iso and misc syscon > arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon > ARM: dts: rtd1195: Add CRT syscon node > dt-bindings: reset: Add Realtek RTD1195 > ARM: dts: rtd1195: Add reset nodes > ARM: dts: rtd1195: Add UART resets > arm64: dts: realtek: rtd16xx: Add CRT syscon node > ARM: dts: rtd1195: Add SB2 and SCPU Wrapper syscon nodes > arm64: dts: realtek: rtd129x: Add SB2 and SCPU Wrapper syscon nodes > arm64: dts: realtek: rtd139x: Add SB2 and SCPU Wrapper syscon nodes > arm64: dts: realtek: rtd16xx: Add SB2 and SCPU Wrapper syscon nodes > dt-bindings: reset: rtd1295: Add SB2 reset > > arch/arm/boot/dts/rtd1195.dtsi | 110 ++++++++++++++++--- > arch/arm64/boot/dts/realtek/rtd129x.dtsi | 157 ++++++++++++++++++---------- > arch/arm64/boot/dts/realtek/rtd139x.dtsi | 157 ++++++++++++++++++---------- > arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 91 ++++++++++++---- > include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++ > include/dt-bindings/reset/realtek,rtd1295.h | 3 + > 6 files changed, 449 insertions(+), 143 deletions(-) > create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h -- SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Felix Imendörffer HRB 36809 (AG Nürnberg)
> Group the non-iso reset controller nodes into a CRT syscon mfd node. > Group reset controller, watchdog and UART0 into an Isolation mfd node. > Group UART1 and UART2 into a Miscellaneous syscon mfd node. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm64/boot/dts/realtek/rtd139x.dtsi | 147 > +++++++++++++++++++------------ > 1 file changed, 90 insertions(+), 57 deletions(-) > > diff --git a/arch/arm64/boot/dts/realtek/rtd139x.dtsi > b/arch/arm64/boot/dts/realtek/rtd139x.dtsi > index c11a505e43e2..3a571f3b7e38 100644 > --- a/arch/arm64/boot/dts/realtek/rtd139x.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd139x.dtsi > @@ -61,70 +61,31 @@ > #size-cells = <1>; > ranges = <0x0 0x98000000 0x200000>; > > - reset1: reset-controller@0 { > - compatible = "snps,dw-low-reset"; > - reg = <0x0 0x4>; > - #reset-cells = <1>; > - }; > - > - reset2: reset-controller@4 { > - compatible = "snps,dw-low-reset"; > - reg = <0x4 0x4>; > - #reset-cells = <1>; > - }; > - > - reset3: reset-controller@8 { > - compatible = "snps,dw-low-reset"; > - reg = <0x8 0x4>; > - #reset-cells = <1>; > - }; > - > - reset4: reset-controller@50 { > - compatible = "snps,dw-low-reset"; > - reg = <0x50 0x4>; > - #reset-cells = <1>; > - }; > - > - iso_reset: reset-controller@7088 { > - compatible = "snps,dw-low-reset"; > - reg = <0x7088 0x4>; > - #reset-cells = <1>; > - }; > - > - wdt: watchdog@7680 { > - compatible = "realtek,rtd1295-watchdog"; > - reg = <0x7680 0x100>; > - clocks = <&osc27M>; > - }; > - > - uart0: serial@7800 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x7800 0x400>; > - reg-shift = <2>; > + crt: syscon@0 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x0 0x1000>; > reg-io-width = <4>; > - clock-frequency = <27000000>; > - resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; > - status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x0 0x1000>; > }; > > - uart1: serial@1b200 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x1b200 0x100>; > - reg-shift = <2>; > + iso: syscon@7000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x7000 0x1000>; > reg-io-width = <4>; > - clock-frequency = <432000000>; > - resets = <&reset2 RTD1295_RSTN_UR1>; > - status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x7000 0x1000>; > }; > > - uart2: serial@1b400 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x1b400 0x100>; > - reg-shift = <2>; > + misc: syscon@1b000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1b000 0x1000>; > reg-io-width = <4>; > - clock-frequency = <432000000>; > - resets = <&reset2 RTD1295_RSTN_UR2>; > - status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1b000 0x1000>; > }; > }; > > @@ -140,3 +101,75 @@ > }; > }; > }; > + > +&crt { > + reset1: reset-controller@0 { > + compatible = "snps,dw-low-reset"; > + reg = <0x0 0x4>; > + #reset-cells = <1>; > + }; > + > + reset2: reset-controller@4 { > + compatible = "snps,dw-low-reset"; > + reg = <0x4 0x4>; > + #reset-cells = <1>; > + }; > + > + reset3: reset-controller@8 { > + compatible = "snps,dw-low-reset"; > + reg = <0x8 0x4>; > + #reset-cells = <1>; > + }; > + > + reset4: reset-controller@50 { > + compatible = "snps,dw-low-reset"; > + reg = <0x50 0x4>; > + #reset-cells = <1>; > + }; > +}; > + > +&iso { > + iso_reset: reset-controller@88 { > + compatible = "snps,dw-low-reset"; > + reg = <0x88 0x4>; > + #reset-cells = <1>; > + }; > + > + wdt: watchdog@680 { > + compatible = "realtek,rtd1295-watchdog"; > + reg = <0x680 0x100>; > + clocks = <&osc27M>; > + }; > + > + uart0: serial@800 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x800 0x400>; > + reg-shift = <2>; > + reg-io-width = <4>; > + clock-frequency = <27000000>; > + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; > + status = "disabled"; > + }; > +}; > + > +&misc { > + uart1: serial@200 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x200 0x100>; > + reg-shift = <2>; > + reg-io-width = <4>; > + clock-frequency = <432000000>; > + resets = <&reset2 RTD1295_RSTN_UR1>; > + status = "disabled"; > + }; > + > + uart2: serial@400 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x400 0x100>; > + reg-shift = <2>; > + reg-io-width = <4>; > + clock-frequency = <432000000>; > + resets = <&reset2 RTD1295_RSTN_UR2>; > + status = "disabled"; > + }; > +}; > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Group the non-iso reset controller nodes in a CRT syscon mfd node. > Group reset controller, watchdog and UART0 in an Isolation syscon mfd node. > Group UART1 and UART2 into a Miscellaneous syscon mfd node. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm64/boot/dts/realtek/rtd129x.dtsi | 147 > +++++++++++++++++++------------ > 1 file changed, 90 insertions(+), 57 deletions(-) > > diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi > b/arch/arm64/boot/dts/realtek/rtd129x.dtsi > index 0de9e675be16..34dc09790d0b 100644 > --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi > @@ -63,70 +63,31 @@ > #size-cells = <1>; > ranges = <0x0 0x98000000 0x200000>; > > - reset1: reset-controller@0 { > - compatible = "snps,dw-low-reset"; > - reg = <0x0 0x4>; > - #reset-cells = <1>; > - }; > - > - reset2: reset-controller@4 { > - compatible = "snps,dw-low-reset"; > - reg = <0x4 0x4>; > - #reset-cells = <1>; > - }; > - > - reset3: reset-controller@8 { > - compatible = "snps,dw-low-reset"; > - reg = <0x8 0x4>; > - #reset-cells = <1>; > - }; > - > - reset4: reset-controller@50 { > - compatible = "snps,dw-low-reset"; > - reg = <0x50 0x4>; > - #reset-cells = <1>; > - }; > - > - iso_reset: reset-controller@7088 { > - compatible = "snps,dw-low-reset"; > - reg = <0x7088 0x4>; > - #reset-cells = <1>; > - }; > - > - wdt: watchdog@7680 { > - compatible = "realtek,rtd1295-watchdog"; > - reg = <0x7680 0x100>; > - clocks = <&osc27M>; > - }; > - > - uart0: serial@7800 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x7800 0x400>; > - reg-shift = <2>; > + crt: syscon@0 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x0 0x1800>; > reg-io-width = <4>; > - clock-frequency = <27000000>; > - resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; > - status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x0 0x1800>; > }; > > - uart1: serial@1b200 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x1b200 0x100>; > - reg-shift = <2>; > + iso: syscon@7000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x7000 0x1000>; > reg-io-width = <4>; > - clock-frequency = <432000000>; > - resets = <&reset2 RTD1295_RSTN_UR1>; > - status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x7000 0x1000>; > }; > > - uart2: serial@1b400 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x1b400 0x100>; > - reg-shift = <2>; > + misc: syscon@1b000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1b000 0x1000>; > reg-io-width = <4>; > - clock-frequency = <432000000>; > - resets = <&reset2 RTD1295_RSTN_UR2>; > - status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1b000 0x1000>; > }; > }; > > @@ -142,3 +103,75 @@ > }; > }; > }; > + > +&crt { > + reset1: reset-controller@0 { > + compatible = "snps,dw-low-reset"; > + reg = <0x0 0x4>; > + #reset-cells = <1>; > + }; > + > + reset2: reset-controller@4 { > + compatible = "snps,dw-low-reset"; > + reg = <0x4 0x4>; > + #reset-cells = <1>; > + }; > + > + reset3: reset-controller@8 { > + compatible = "snps,dw-low-reset"; > + reg = <0x8 0x4>; > + #reset-cells = <1>; > + }; > + > + reset4: reset-controller@50 { > + compatible = "snps,dw-low-reset"; > + reg = <0x50 0x4>; > + #reset-cells = <1>; > + }; > +}; > + > +&iso { > + iso_reset: reset-controller@88 { > + compatible = "snps,dw-low-reset"; > + reg = <0x88 0x4>; > + #reset-cells = <1>; > + }; > + > + wdt: watchdog@680 { > + compatible = "realtek,rtd1295-watchdog"; > + reg = <0x680 0x100>; > + clocks = <&osc27M>; > + }; > + > + uart0: serial@800 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x800 0x400>; > + reg-shift = <2>; > + reg-io-width = <4>; > + clock-frequency = <27000000>; > + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; > + status = "disabled"; > + }; > +}; > + > +&misc { > + uart1: serial@200 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x200 0x100>; > + reg-shift = <2>; > + reg-io-width = <4>; > + clock-frequency = <432000000>; > + resets = <&reset2 RTD1295_RSTN_UR1>; > + status = "disabled"; > + }; > + > + uart2: serial@400 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x400 0x100>; > + reg-shift = <2>; > + reg-io-width = <4>; > + clock-frequency = <432000000>; > + resets = <&reset2 RTD1295_RSTN_UR2>; > + status = "disabled"; > + }; > +}; > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD16xx DT. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > index 776efc10bab2..bc88cf749f33 100644 > --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi > @@ -136,6 +136,15 @@ > ranges = <0x0 0x7000 0x1000>; > }; > > + sb2: syscon@1a000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1a000 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1a000 0x1000>; > + }; > + > misc: syscon@1b000 { > compatible = "syscon", "simple-mfd"; > reg = <0x1b000 0x1000>; > @@ -144,6 +153,15 @@ > #size-cells = <1>; > ranges = <0x0 0x1b000 0x1000>; > }; > + > + scpu_wrapper: syscon@1d000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1d000 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1d000 0x1000>; > + }; > }; > > gic: interrupt-controller@ff100000 { > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD139x DT. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm64/boot/dts/realtek/rtd139x.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/realtek/rtd139x.dtsi > b/arch/arm64/boot/dts/realtek/rtd139x.dtsi > index 3a571f3b7e38..a3c10ceeb586 100644 > --- a/arch/arm64/boot/dts/realtek/rtd139x.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd139x.dtsi > @@ -79,6 +79,15 @@ > ranges = <0x0 0x7000 0x1000>; > }; > > + sb2: syscon@1a000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1a000 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1a000 0x1000>; > + }; > + > misc: syscon@1b000 { > compatible = "syscon", "simple-mfd"; > reg = <0x1b000 0x1000>; > @@ -87,6 +96,15 @@ > #size-cells = <1>; > ranges = <0x0 0x1b000 0x1000>; > }; > + > + scpu_wrapper: syscon@1d000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1d000 0x2000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1d000 0x2000>; > + }; > }; > > gic: interrupt-controller@ff011000 { > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD129x DT. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm64/boot/dts/realtek/rtd129x.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi > b/arch/arm64/boot/dts/realtek/rtd129x.dtsi > index 34dc09790d0b..39aefe66a794 100644 > --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi > @@ -81,6 +81,15 @@ > ranges = <0x0 0x7000 0x1000>; > }; > > + sb2: syscon@1a000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1a000 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1a000 0x1000>; > + }; > + > misc: syscon@1b000 { > compatible = "syscon", "simple-mfd"; > reg = <0x1b000 0x1000>; > @@ -89,6 +98,15 @@ > #size-cells = <1>; > ranges = <0x0 0x1b000 0x1000>; > }; > + > + scpu_wrapper: syscon@1d000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1d000 0x2000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1d000 0x2000>; > + }; > }; > > gic: interrupt-controller@ff011000 { > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Prepare a CRT syscon mfd node. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm/boot/dts/rtd1195.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi > index a74f530dc439..ac37366ff7c4 100644 > --- a/arch/arm/boot/dts/rtd1195.dtsi > +++ b/arch/arm/boot/dts/rtd1195.dtsi > @@ -100,6 +100,15 @@ > #size-cells = <1>; > ranges = <0x0 0x18000000 0x70000>; > > + crt: syscon@0 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x0 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x0 0x1000>; > + }; > + > iso: syscon@7000 { > compatible = "syscon", "simple-mfd"; > reg = <0x7000 0x1000>; > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Add a header with symbolic reset indices for Realtek RTD1195 SoC. > Naming was derived from BSP register description headers. > > Acked-by: Philipp Zabel <p.zabel@pengutronix.de> > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > v1: From RTD1195 v4 series > > include/dt-bindings/reset/realtek,rtd1195.h | 74 > +++++++++++++++++++++++++++++ > 1 file changed, 74 insertions(+) > create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h > > diff --git a/include/dt-bindings/reset/realtek,rtd1195.h > b/include/dt-bindings/reset/realtek,rtd1195.h > new file mode 100644 > index 000000000000..27902abf935b > --- /dev/null > +++ b/include/dt-bindings/reset/realtek,rtd1195.h > @@ -0,0 +1,74 @@ > +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ > +/* > + * Realtek RTD1195 reset controllers > + * > + * Copyright (c) 2017 Andreas Färber > + */ > +#ifndef DT_BINDINGS_RESET_RTD1195_H > +#define DT_BINDINGS_RESET_RTD1195_H > + > +/* soft reset 1 */ > +#define RTD1195_RSTN_MISC 0 > +#define RTD1195_RSTN_RNG 1 > +#define RTD1195_RSTN_USB3_POW 2 > +#define RTD1195_RSTN_GSPI 3 > +#define RTD1195_RSTN_USB3_P0_MDIO 4 > +#define RTD1195_RSTN_VE_H265 5 > +#define RTD1195_RSTN_USB 6 > +#define RTD1195_RSTN_USB_PHY0 8 > +#define RTD1195_RSTN_USB_PHY1 9 > +#define RTD1195_RSTN_HDMIRX 11 > +#define RTD1195_RSTN_HDMI 12 > +#define RTD1195_RSTN_ETN 14 > +#define RTD1195_RSTN_AIO 15 > +#define RTD1195_RSTN_GPU 16 > +#define RTD1195_RSTN_VE_H264 17 > +#define RTD1195_RSTN_VE_JPEG 18 > +#define RTD1195_RSTN_TVE 19 > +#define RTD1195_RSTN_VO 20 > +#define RTD1195_RSTN_LVDS 21 > +#define RTD1195_RSTN_SE 22 > +#define RTD1195_RSTN_DCU 23 > +#define RTD1195_RSTN_DC_PHY 24 > +#define RTD1195_RSTN_CP 25 > +#define RTD1195_RSTN_MD 26 > +#define RTD1195_RSTN_TP 27 > +#define RTD1195_RSTN_AE 28 > +#define RTD1195_RSTN_NF 29 > +#define RTD1195_RSTN_MIPI 30 > + > +/* soft reset 2 */ > +#define RTD1195_RSTN_ACPU 0 > +#define RTD1195_RSTN_VCPU 1 > +#define RTD1195_RSTN_PCR 9 > +#define RTD1195_RSTN_CR 10 > +#define RTD1195_RSTN_EMMC 11 > +#define RTD1195_RSTN_SDIO 12 > +#define RTD1195_RSTN_I2C_5 18 > +#define RTD1195_RSTN_RTC 20 > +#define RTD1195_RSTN_I2C_4 23 > +#define RTD1195_RSTN_I2C_3 24 > +#define RTD1195_RSTN_I2C_2 25 > +#define RTD1195_RSTN_I2C_1 26 > +#define RTD1195_RSTN_UR1 28 > + > +/* soft reset 3 */ > +#define RTD1195_RSTN_SB2 0 > + > +/* iso soft reset */ > +#define RTD1195_ISO_RSTN_VFD 0 > +#define RTD1195_ISO_RSTN_IR 1 > +#define RTD1195_ISO_RSTN_CEC0 2 > +#define RTD1195_ISO_RSTN_CEC1 3 > +#define RTD1195_ISO_RSTN_DP 4 > +#define RTD1195_ISO_RSTN_CBUSTX 5 > +#define RTD1195_ISO_RSTN_CBUSRX 6 > +#define RTD1195_ISO_RSTN_EFUSE 7 > +#define RTD1195_ISO_RSTN_UR0 8 > +#define RTD1195_ISO_RSTN_GMAC 9 > +#define RTD1195_ISO_RSTN_GPHY 10 > +#define RTD1195_ISO_RSTN_I2C_0 11 > +#define RTD1195_ISO_RSTN_I2C_6 12 > +#define RTD1195_ISO_RSTN_CBUS 13 > + > +#endif > -- > 2.16.4 > Acked-by: James Tai <james.tai@realtek.com>
> Add reset controller nodes for Realtek RTD1195 SoC. > > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > v1: From RTD1195 v4 series (James wants to change the compatible string) > > arch/arm/boot/dts/rtd1195.dtsi | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi > index ac37366ff7c4..886845e52205 100644 > --- a/arch/arm/boot/dts/rtd1195.dtsi > +++ b/arch/arm/boot/dts/rtd1195.dtsi > @@ -141,7 +141,33 @@ > }; > }; > > +&crt { > + reset1: reset-controller@0 { > + compatible = "snps,dw-low-reset"; > + reg = <0x0 0x4>; > + #reset-cells = <1>; > + }; > + > + reset2: reset-controller@4 { > + compatible = "snps,dw-low-reset"; > + reg = <0x4 0x4>; > + #reset-cells = <1>; > + }; > + > + reset3: reset-controller@8 { > + compatible = "snps,dw-low-reset"; > + reg = <0x8 0x4>; > + #reset-cells = <1>; > + }; > +}; > + > &iso { > + iso_reset: reset-controller@88 { > + compatible = "snps,dw-low-reset"; > + reg = <0x88 0x4>; > + #reset-cells = <1>; > + }; > + > wdt: watchdog@680 { > compatible = "realtek,rtd1295-watchdog"; > reg = <0x680 0x100>; > -- > 2.16.4 > Acked-by: James Tai <james.tai@realtek.com>
> Associate the UART nodes with the corresponding reset controller bits. > > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > v1: From RTD1195 v4 series > > arch/arm/boot/dts/rtd1195.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi > index 886845e52205..09acb99083c1 100644 > --- a/arch/arm/boot/dts/rtd1195.dtsi > +++ b/arch/arm/boot/dts/rtd1195.dtsi > @@ -8,6 +8,7 @@ > /memreserve/ 0x17fff000 0x00001000; > > #include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/reset/realtek,rtd1195.h> > > / { > compatible = "realtek,rtd1195"; > @@ -179,6 +180,7 @@ > reg = <0x800 0x400>; > reg-shift = <2>; > reg-io-width = <4>; > + resets = <&iso_reset RTD1195_ISO_RSTN_UR0>; > clock-frequency = <27000000>; > status = "disabled"; > }; > @@ -190,6 +192,7 @@ > reg = <0x200 0x100>; > reg-shift = <2>; > reg-io-width = <4>; > + resets = <&reset2 RTD1195_RSTN_UR1>; > clock-frequency = <27000000>; > status = "disabled"; > }; > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
> Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD1195 DT. > > Cc: James Tai <james.tai@realtek.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > arch/arm/boot/dts/rtd1195.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi > index 09acb99083c1..21897210d9d0 100644 > --- a/arch/arm/boot/dts/rtd1195.dtsi > +++ b/arch/arm/boot/dts/rtd1195.dtsi > @@ -119,6 +119,15 @@ > ranges = <0x0 0x7000 0x1000>; > }; > > + sb2: syscon@1a000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1a000 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1a000 0x1000>; > + }; > + > misc: syscon@1b000 { > compatible = "syscon", "simple-mfd"; > reg = <0x1b000 0x1000>; > @@ -127,6 +136,15 @@ > #size-cells = <1>; > ranges = <0x0 0x1b000 0x1000>; > }; > + > + scpu_wrapper: syscon@1d000 { > + compatible = "syscon", "simple-mfd"; > + reg = <0x1d000 0x1000>; > + reg-io-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1d000 0x1000>; > + }; > }; > > gic: interrupt-controller@ff011000 { > -- > 2.16.4 > > Acked-by: James Tai <james.tai@realtek.com>
Hi Andreas, > > I'm waiting for your Acked-by of the blocks & numbers in these patches. > Other Realtek engineers are also invited to respond, of course. I have reviewed these patches. Thank you for your contribution. Regards, James
Hi James, Am 31.12.19 um 10:47 schrieb James Tai: >> I'm waiting for your Acked-by of the blocks & numbers in these patches. >> Other Realtek engineers are also invited to respond, of course. > > I have reviewed these patches. Thanks - does anything need changes in patch 01 or is that ack'ed, too? Regards, Andreas
Am 03.01.20 um 03:58 schrieb Andreas Färber: > Hi James, > > Am 31.12.19 um 10:47 schrieb James Tai: >>> I'm waiting for your Acked-by of the blocks & numbers in these patches. >>> Other Realtek engineers are also invited to respond, of course. >> >> I have reviewed these patches. > > Thanks - does anything need changes in patch 01 or is that ack'ed, too? No further response, so all (incl. 01/14) applied to linux-realtek.git: https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek.git/log/?h=v5.6/dt Should there be anything wrong with 01/14, just send a follow-up patch. Regards, Andreas