From patchwork Mon Dec 2 18:21:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180625 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp345916ile; Mon, 2 Dec 2019 10:22:20 -0800 (PST) X-Google-Smtp-Source: APXvYqyXO3Ah5XXV8o3Urz3y1q1xJIsSCcQ3ay7txhXBc+P3PyvWiousvbRJJM94C50zAiUhFTwZ X-Received: by 2002:a17:906:a3d1:: with SMTP id ca17mr511113ejb.267.1575310939977; Mon, 02 Dec 2019 10:22:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575310939; cv=none; d=google.com; s=arc-20160816; b=Z+2xUyqZFw1yzJxSP1WcxrItyUeiZRteHRURYLlhQ5UqnkleUD3KaTfiOW94pK92Il EZrGTo0LMo+3M+U/33cmjH3y6uRll2aW/BxxYpPgWmt6M0fqarK/nUg4Tkvc0mZkiMQ6 XiAsi3u9qkkavyya8Z3A7Shk8Z67fjC5BZXdtJ9uGAPETY7BZM7c24hJF8ybWtiNlorV 2EIFA8GHOymBKlMwne+I9+xcQSlSgc9cYPXI3Lk0O2oqc9eMRZV8K5q/UbHnPj92iquU NTTWkRfMBpe0nnVX62D34M5rkWhRFw4KkJ42ZVzKvwKYyooGPHAvAb/PUYTwksrEYjS/ slLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=B5rqDtAszDSv59YbAfL71ko16A/LMHRWY03uyrH7MNY=; b=qIVTswLzRyRXNtBdk2+sQcKND0oFUKK57dovluB+syUbbNxgK2YIpCy7LyShjyOpfq umbwjD8eqyllcY5hzYIqJWaw308f2vdmf+EiyeH1MgdTY8fBxBSiwWM595kYCvs1ipR2 fpm1ZVzUnziS4YI3uTscBIH12WNVFj43bScpAc2oiQFrq2KGySRg5jneEbmjdU13wCmX U1wD5WAlmPf1CHBT7hni6HCRhFOv+EV/iS/hgC9qMrnCcHHd7l2GfrfPo3mG9adYUmqK e1XNwfSp1yv15ApWN/etO/K7eQGORk/MjAJ1MLRJ21MHQm17AWaX47jiuQvE/AazmlAZ FEug== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c11si157152eds.65.2019.12.02.10.22.19; Mon, 02 Dec 2019 10:22:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727868AbfLBSWP (ORCPT + 8 others); Mon, 2 Dec 2019 13:22:15 -0500 Received: from mx2.suse.de ([195.135.220.15]:35890 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727671AbfLBSWP (ORCPT ); Mon, 2 Dec 2019 13:22:15 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 98844AD98; Mon, 2 Dec 2019 18:22:13 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , devicetree@vger.kernel.org, Rob Herring , James Tai Subject: [PATCH 00/14] ARM: dts: realtek: Introduce syscon Date: Mon, 2 Dec 2019 19:21:50 +0100 Message-Id: <20191202182205.14629-1-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This patch series factors out system controller multi-function device nodes for CRT, Iso, Misc, SB2 and SCPU Wrapper IP blocks. It was inspired by my SoC info RFC, as discussed in its cover letter [1]. Goal of DT is to describe the hardware, and in previous patches we've already introduced Realtek's r-bus as node layer. The next step here is to model multi-function blocks as nodes. In order to cope with 80-character line limit, child nodes are added via reference rather than in-place. Also included is a patch adding a reset constant for the SB2 block added. We may need to follow up with bindings adding compatibles, clocks and resets. This series is based on my RTD1195 v4 [2] (except for reset, rebased here), my RTD1395 v2 [3] and James' modified RTD1619 v3 [4]. The irq mux series v5 [5] has been rebased onto this series, v6 to be sent. The SoC info RFC series [1] is still being updated, v2 to be posted later. Latest experimental patches at: https://github.com/afaerber/linux/commits/rtd1295-next Have a lot of fun! Cheers, Andreas [1] https://patchwork.kernel.org/cover/11224261/ [2] https://patchwork.kernel.org/cover/11258949/ [3] https://patchwork.kernel.org/cover/11268955/ [4] https://patchwork.kernel.org/patch/11239697/ [5] https://patchwork.kernel.org/cover/11255291/ Cc: devicetree@vger.kernel.org Cc: Rob Herring Cc: James Tai Andreas Färber (14): ARM: dts: rtd1195: Introduce iso and misc syscon arm64: dts: realtek: rtd129x: Introduce CRT, iso and misc syscon arm64: dts: realtek: rtd139x: Introduce CRT, iso and misc syscon arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon ARM: dts: rtd1195: Add CRT syscon node dt-bindings: reset: Add Realtek RTD1195 ARM: dts: rtd1195: Add reset nodes ARM: dts: rtd1195: Add UART resets arm64: dts: realtek: rtd16xx: Add CRT syscon node ARM: dts: rtd1195: Add SB2 and SCPU Wrapper syscon nodes arm64: dts: realtek: rtd129x: Add SB2 and SCPU Wrapper syscon nodes arm64: dts: realtek: rtd139x: Add SB2 and SCPU Wrapper syscon nodes arm64: dts: realtek: rtd16xx: Add SB2 and SCPU Wrapper syscon nodes dt-bindings: reset: rtd1295: Add SB2 reset arch/arm/boot/dts/rtd1195.dtsi | 110 ++++++++++++++++--- arch/arm64/boot/dts/realtek/rtd129x.dtsi | 157 ++++++++++++++++++---------- arch/arm64/boot/dts/realtek/rtd139x.dtsi | 157 ++++++++++++++++++---------- arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 91 ++++++++++++---- include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++ include/dt-bindings/reset/realtek,rtd1295.h | 3 + 6 files changed, 449 insertions(+), 143 deletions(-) create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h -- 2.16.4 Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai Acked-by: James Tai