From patchwork Fri Oct 30 09:12:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 314727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 754A1C55179 for ; Fri, 30 Oct 2020 09:23:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0B15920728 for ; Fri, 30 Oct 2020 09:23:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="AIhW2Yc+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726176AbgJ3JXj (ORCPT ); Fri, 30 Oct 2020 05:23:39 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:49457 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726110AbgJ3JXj (ORCPT ); Fri, 30 Oct 2020 05:23:39 -0400 X-UUID: 7b9274f5c31a45df890ed48599eff29c-20201030 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=ZpW9Nn3WTF72bsEP3pngt8VigIg6cPhwRlY9GBZBlXw=; b=AIhW2Yc+ZpjSEsx+sO3xpFJxvt4v+rmpQ7J+QEkGU32WywXPCARvCiCQRRBH1/ah0s7QAcU3lMWW1Vh6pGa32JXhNnFfX5j4dJRZXO9pyI7kcJ8x3yd0fUR3Q/h+Y0NNbtfE+tPiHm6mGdvQT8Yj2+3XDgwZfCng/GAcZMGFQnM=; X-UUID: 7b9274f5c31a45df890ed48599eff29c-20201030 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 35128789; Fri, 30 Oct 2020 17:13:15 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Oct 2020 17:13:13 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Oct 2020 17:13:12 +0800 From: Yong Wu To: Matthias Brugger , Krzysztof Kozlowski , Rob Herring CC: Joerg Roedel , Robin Murphy , Will Deacon , Tomasz Figa , , , , , , , , , Nicolas Boichat , , Subject: [PATCH v4 0/3] MT8192 SMI support Date: Fri, 30 Oct 2020 17:12:51 +0800 Message-ID: <20201030091254.26382-1-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: 3C519A5FD6F45B54AFFDD85386FD1928BE0CBF7344F9190F98C31982F514EB482000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patchset mainly adds SMI support for mt8192. It comes from the patchset[1]. I seperate the smi part into this patchset. And the two part(IOMMU/SMI) patchset don't depend on each other. Rebase on v5.10-rc1. changenote: v4: add if-then segment in the binding. v3: [1]. [1] https://lore.kernel.org/linux-iommu/20200930070647.10188-1-yong.wu@mediatek.com/ Yong Wu (3): dt-bindings: memory: mediatek: Convert SMI to DT schema dt-bindings: memory: mediatek: Add mt8192 support memory: mtk-smi: Add mt8192 support .../mediatek,smi-common.txt | 50 ------ .../mediatek,smi-common.yaml | 142 ++++++++++++++++++ .../memory-controllers/mediatek,smi-larb.txt | 50 ------ .../memory-controllers/mediatek,smi-larb.yaml | 131 ++++++++++++++++ drivers/memory/mtk-smi.c | 19 +++ 5 files changed, 292 insertions(+), 100 deletions(-) delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml -- 2.18.0