Message ID | 20210111113010.32056-1-manivannan.sadhasivam@linaro.org |
---|---|
Headers | show |
Series | Add support for USB3 PHY on SDX55 | expand |
On Mon, 11 Jan 2021 17:00:09 +0530, Manivannan Sadhasivam wrote: > Add devicetree YAML binding for Qualcomm QMP Super Speed (SS) PHY found > in SDX55. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 27 +++++++++++++++++++ > 1 file changed, 27 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
On 11-01-21, 17:00, Manivannan Sadhasivam wrote: > Hello, > > This series adds USB3 PHY support for SDX55 platform. The USB3 PHY is of > type QMP and revision 4.0.0. In this revision, "com_aux" clock is not > utilized. > > This series has been tested on SDX55-MTP along with the relevant DT node. Applied, thanks -- ~Vinod