From patchwork Mon Jan 18 04:43:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 365458 Delivered-To: patch@linaro.org Received: by 2002:a02:ccad:0:0:0:0:0 with SMTP id t13csp1925936jap; Sun, 17 Jan 2021 20:44:30 -0800 (PST) X-Google-Smtp-Source: ABdhPJyTAjcNgkZWpQWbwzeI7UwLk59zX7IXzAFgy0hnHnC3PnxLoNvCaLfimZjbLVWkV1D7U3ll X-Received: by 2002:a05:6402:388:: with SMTP id o8mr17544790edv.359.1610945070261; Sun, 17 Jan 2021 20:44:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610945070; cv=none; d=google.com; s=arc-20160816; b=NsJf7uxOJCBTX6kuSGiT2dCu3Fbuzz0WUgIytoqbqgE/P+dHDXTSchU5Q6LKhF6hLD 8KYV7hmev8xKrkitbazRMQ3on0nqfekfWHZCvtORdZqwzc7Nfd3nyClnuN70r0pNymic IQV3sYPPvnUkPrTtkBgWNEXdvzU9yJF1a89xFRGn3spwJej0E5rIvNL2RjXI6bNdhpSo C0LGZX0RAGc71++MiSVVkj8DL1pYG8+3PpfjaJP+dOtUHaGUHG0HayqlC3zxwb6gvjC2 SpQzBqoq720RmUtojB+zJIrxEHDx4Jd8T2nCvWOz9l8dmajCBgW2Atmn3+aafKzSRTjg tcIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=6WGnzCOKPtoEEuYrCUoj7GvxzNMi90c2ZQ4Q/4KTFUc=; b=NzAZJ2UfJmJ18DZBhKg9vayhMbrsgbNcDbC28SLNMfF35ML3m7v2WERDBdcXqUH9do aTEByVJFgC0/JOtCRLlhcOokO+u0dkcspfbOPvQsVoGpikrtVHuyQKwZ+GxX/hIq26t6 WzM6rrJ3ebLz4Rm7CMpGs7/WEdE/sgySX7UMFHyvTmxIv4rMgNobKqehKd/txXnZUv4A qO1e9tdxMqjyaS6PZ+l5Urunfv6nE+vWCF6ZJfBFIVIev/wV8sWdzU54HQUwP6W9xR02 spGAcLnfOaBm+Jv7i47wcHAC8IcoEF2njJmksMR6GJNltAWWb+yeLnTV4Thl4VM38mLk 3jBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=biAB2Xr2; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id yd15si987179ejb.577.2021.01.17.20.44.30; Sun, 17 Jan 2021 20:44:30 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=biAB2Xr2; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728277AbhAREo2 (ORCPT + 6 others); Sun, 17 Jan 2021 23:44:28 -0500 Received: from mail.kernel.org ([198.145.29.99]:56764 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726350AbhAREo0 (ORCPT ); Sun, 17 Jan 2021 23:44:26 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id A8F46224B0; Mon, 18 Jan 2021 04:43:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1610945026; bh=AOeIzUAyMYJhagELJkXlIlVvJ3mEHHKHK6fP6TKYtC8=; h=From:To:Cc:Subject:Date:From; b=biAB2Xr2baQqdfX57k6P+JuluJ9hoMBlhuM5AbSN/d8zBkeYQwDgycILOlKLeunk+ INei5/rkzqlXOColh0AoWysg7cnD8ksQQLRy56zXytltwnNSUH0QSXpbevkdpeKa4w Wk4j4pFjsEejs5OOfQPTwcVrdgb0BH2MHkb99tNVFYc3qI2V0QCSxA5XsDApqwzWET 55m6SPLF02xR/U3PI7zgBofcDQV95zACLlXJaxmwvH7Z7wS5EGYvPyHZHBB3i5tGxp azfYeWGiOSBDx+wQGrBcNhEXGVJQyFw0qyOmUu3GJU3PBVS0cd/N0ijT6hmtf23Et1 xki/6ww2aNxfw== From: Vinod Koul To: Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , Andy Gross , Michael Turquette , Rob Herring , Taniya Das , AngeloGioacchino Del Regno , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 0/5] Add clock drivers for SM8350 Date: Mon, 18 Jan 2021 10:13:16 +0530 Message-Id: <20210118044321.2571775-1-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds gcc clock controller drivers for the controller found in SM8350 SoC Changes in v4: - Add Ack from Rob on binding - modularize alpha_pll_trion_set_rate() Changes in v3: - Drop rpmh clk patches applied - Add a new patch to replace regval with val as suggested by Stephen - Fix comments for new Lucid 5LPE PLL: sort new defines by BIT numbers, fix comments, use alpha_pll_check_rate_margin(), rework clk_lucid_5lpe_pll_postdiv_set_rate() logic - Add power domains and optional clocks in bindings - Fix comments for gcc sm8350 driver: clean includes used, use only .fw_name for clocks defined in DT, use floor ops for sdcc clocks, remove critical clocks and enable them in probe, add comments for clks using BRANCH_HALT_SKIP and BRANCH_HALT_DELAY Changes in v2: - Add r-b from Bjorn - Add the gcc_qupv3_wrap_1_{m|s}_ahb_clk and gcc_qupv3_wrap1_s5_clk Vinod Koul (3): clk: qcom: clk-alpha-pll: replace regval with val clk: qcom: clk-alpha-pll: modularize alpha_pll_trion_set_rate() dt-bindings: clock: Add SM8350 GCC clock bindings Vivek Aknurwar (2): clk: qcom: clk-alpha-pll: Add support for Lucid 5LPE PLL clk: qcom: gcc: Add clock driver for SM8350 .../bindings/clock/qcom,gcc-sm8350.yaml | 96 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-alpha-pll.c | 209 +- drivers/clk/qcom/clk-alpha-pll.h | 4 + drivers/clk/qcom/gcc-sm8350.c | 3790 +++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sm8350.h | 261 ++ 7 files changed, 4353 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml create mode 100644 drivers/clk/qcom/gcc-sm8350.c create mode 100644 include/dt-bindings/clock/qcom,gcc-sm8350.h -- 2.26.2 Reviewed-by: AngeloGioacchino Del Regno