mbox series

[0/6] Add RZ/G2L USB2.0 phy and host support

Message ID 20210611134642.24029-1-biju.das.jz@bp.renesas.com
Headers show
Series Add RZ/G2L USB2.0 phy and host support | expand

Message

Biju Das June 11, 2021, 1:46 p.m. UTC 
This patch series adds USB2.0 phy and Host support for RZ/G2L SoC.

A new driver introduced for RZ/G2L USB phy control block,
which mainly controls reset and power down of the USB2.0/PHY.

This patchset is based on master branch [1]

[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/

Biju Das (6):
  dt-bindings: phy: renesas: Document RZ/G2L USB PHY Control bindings
  drivers: clk: renesas: r9a07g044-cpg: Add USB clocks
  phy: renesas: Add RZ/G2L usb phy control driver
  arm64: configs: defconfig: Enable RZ/G2L USB PHY control driver
  dt-bindings: phy: renesas,usb2-phy: Document RZ/G2L phy bindings
  arm64: dts: renesas: r9a07g044: Add USB2.0 phy and host support

 .../phy/renesas,rzg2l-usbphyctrl.yaml         |  50 ++++++
 .../bindings/phy/renesas,usb2-phy.yaml        |   1 +
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    |  81 +++++++++
 arch/arm64/configs/defconfig                  |   1 +
 drivers/clk/renesas/r9a07g044-cpg.c           |   6 +
 drivers/phy/renesas/Kconfig                   |   7 +
 drivers/phy/renesas/Makefile                  |   1 +
 drivers/phy/renesas/phy-rzg2l-usbphyctrl.c    | 163 ++++++++++++++++++
 8 files changed, 310 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml
 create mode 100644 drivers/phy/renesas/phy-rzg2l-usbphyctrl.c

Comments

Vinod Koul June 21, 2021, 4:01 a.m. UTC | #1 
On 11-06-21, 14:46, Biju Das wrote:
> Add device tree binding document for RZ/G2L USB PHY control driver.


Rob ?

> 

> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

> ---

>  .../phy/renesas,rzg2l-usbphyctrl.yaml         | 50 +++++++++++++++++++

>  1 file changed, 50 insertions(+)

>  create mode 100644 Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml

> 

> diff --git a/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml

> new file mode 100644

> index 000000000000..5fd316a2e79e

> --- /dev/null

> +++ b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml

> @@ -0,0 +1,50 @@

> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2

> +---

> +$id: http://devicetree.org/schemas/phy/renesas,rzg2l-usbphyctrl.yaml#

> +$schema: http://devicetree.org/meta-schemas/core.yaml#

> +

> +title: Renesas RZ/G2L USB2.0 PHY Control

> +

> +maintainers:

> +  - Biju Das <biju.das.jz@bp.renesas.com>

> +

> +description:

> +  The RZ/G2L USB2.0 PHY Control mainly controls reset and power down of the

> +  USB/PHY.

> +

> +properties:

> +  compatible:

> +    items:

> +      - enum:

> +          - renesas,r9a07g044-usbphyctrl # RZ/G2{L,LC}

> +      - const: renesas,rzg2l-usbphyctrl

> +

> +  reg:

> +    maxItems: 1

> +

> +  '#phy-cells':

> +    # see phy-bindings.txt in the same directory

> +    const: 1

> +    description: |

> +      The phandle's argument in the PHY specifier is the phy reset control bit

> +      of usb phy control.

> +      0 = Port 1 Phy reset

> +      1 = Port 2 Phy reset

> +    enum: [ 0, 1 ]

> +

> +required:

> +  - compatible

> +  - reg

> +  - '#phy-cells'

> +

> +additionalProperties: false

> +

> +examples:

> +  - |

> +    usbphyctrl@11c40000 {

> +        compatible = "renesas,r9a07g044-usbphyctrl",

> +                     "renesas,rzg2l-usbphyctrl";

> +        reg = <0x11c40000 0x10000>;

> +        #phy-cells = <1>;

> +    };

> -- 

> 2.17.1


-- 
~Vinod
Biju Das June 21, 2021, 6:40 a.m. UTC | #2 
Hi All,

As per the clock list document, I need to update the bindings.

I will send V2 this changes.

Regards,
Biju

> -----Original Message-----

> From: Vinod Koul <vkoul@kernel.org>

> Sent: 21 June 2021 05:02

> To: Biju Das <biju.das.jz@bp.renesas.com>; Rob Herring

> <robh+dt@kernel.org>

> Cc: Kishon Vijay Abraham I <kishon@ti.com>; linux-phy@lists.infradead.org;

> devicetree@vger.kernel.org; Geert Uytterhoeven <geert+renesas@glider.be>;

> Chris Paterson <Chris.Paterson2@renesas.com>; Biju Das

> <biju.das@bp.renesas.com>; Prabhakar Mahadev Lad <prabhakar.mahadev-

> lad.rj@bp.renesas.com>; linux-renesas-soc@vger.kernel.org

> Subject: Re: [PATCH 1/6] dt-bindings: phy: renesas: Document RZ/G2L USB

> PHY Control bindings

> 

> On 11-06-21, 14:46, Biju Das wrote:

> > Add device tree binding document for RZ/G2L USB PHY control driver.

> 

> Rob ?

> 

> >

> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

> > ---

> >  .../phy/renesas,rzg2l-usbphyctrl.yaml         | 50 +++++++++++++++++++

> >  1 file changed, 50 insertions(+)

> >  create mode 100644

> > Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml

> >

> > diff --git

> > a/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml

> > b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml

> > new file mode 100644

> > index 000000000000..5fd316a2e79e

> > --- /dev/null

> > +++ b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.y

> > +++ aml

> > @@ -0,0 +1,50 @@

> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2

> > +---

> > +$id:

> > +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi

> > +cetree.org%2Fschemas%2Fphy%2Frenesas%2Crzg2l-usbphyctrl.yaml%23&amp;d

> > +ata=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7C28c0b4be786244eaef1008d9

> > +346949a2%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C637598449085051

> > +587%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT

> > +iI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=WtOl%2BWHTYN4TuB21rTKdJjdx

> > +bKLK96N7NkiSiRT65U0%3D&amp;reserved=0

> > +$schema:

> > +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi

> > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cbiju.das.

> > +jz%40bp.renesas.com%7C28c0b4be786244eaef1008d9346949a2%7C53d82571da19

> > +47e49cb4625a166a4a2a%7C0%7C0%7C637598449085051587%7CUnknown%7CTWFpbGZ

> > +sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%

> > +3D%7C1000&amp;sdata=Y%2FVo3raj5AqUIv%2BaN0Vavdph6cHdWf1a7Imq6chC2KQ%3

> > +D&amp;reserved=0

> > +

> > +title: Renesas RZ/G2L USB2.0 PHY Control

> > +

> > +maintainers:

> > +  - Biju Das <biju.das.jz@bp.renesas.com>

> > +

> > +description:

> > +  The RZ/G2L USB2.0 PHY Control mainly controls reset and power down

> > +of the

> > +  USB/PHY.

> > +

> > +properties:

> > +  compatible:

> > +    items:

> > +      - enum:

> > +          - renesas,r9a07g044-usbphyctrl # RZ/G2{L,LC}

> > +      - const: renesas,rzg2l-usbphyctrl

> > +

> > +  reg:

> > +    maxItems: 1

> > +

> > +  '#phy-cells':

> > +    # see phy-bindings.txt in the same directory

> > +    const: 1

> > +    description: |

> > +      The phandle's argument in the PHY specifier is the phy reset

> control bit

> > +      of usb phy control.

> > +      0 = Port 1 Phy reset

> > +      1 = Port 2 Phy reset

> > +    enum: [ 0, 1 ]

> > +

> > +required:

> > +  - compatible

> > +  - reg

> > +  - '#phy-cells'

> > +

> > +additionalProperties: false

> > +

> > +examples:

> > +  - |

> > +    usbphyctrl@11c40000 {

> > +        compatible = "renesas,r9a07g044-usbphyctrl",

> > +                     "renesas,rzg2l-usbphyctrl";

> > +        reg = <0x11c40000 0x10000>;

> > +        #phy-cells = <1>;

> > +    };

> > --

> > 2.17.1

> 

> --

> ~Vinod