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[00/18] dt-bindings: irqchip: include generic schema

Message ID 20220317115542.450032-1-krzysztof.kozlowski@canonical.com
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Series dt-bindings: irqchip: include generic schema | expand

Message

Krzysztof Kozlowski March 17, 2022, 11:55 a.m. UTC 
Hi,

The DTS patches can be picked up independently.

Best regards,
Krzysztof

Krzysztof Kozlowski (18):
  ARM: dts: nspire: use lower case hex addresses in node unit addresses
  ARM: dts: ox820: align interrupt controller node name with dtschema
  ARM: dts: socfpga: align interrupt controller node name with dtschema
  dt-bindings: irqchip: actions,owl-sirq: include generic schema
  dt-bindings: irqchip: fsl: include generic schema
  dt-bindings: irqchip: ingenic: include generic schema
  dt-bindings: irqchip: intel,ixp4xx: include generic schema
  dt-bindings: irqchip: kontron,sl28cpld: include generic schema
  dt-bindings: irqchip: loongson: include generic schema
  dt-bindings: irqchip: microchip,eic: include generic schema
  dt-bindings: irqchip: mrvl,intc: include generic schema
  dt-bindings: irqchip: mstar,mst-intc: include generic schema
  dt-bindings: irqchip: mti,gic: include generic schema
  dt-bindings: irqchip: nuvoton,wpcm450-aic: include generic schema
  dt-bindings: irqchip: realtek,rtl-intc: include generic schema
  dt-bindings: irqchip: renesas: include generic schema
  dt-bindings: irqchip: sifive: include generic schema
  dt-bindings: irqchip: ti: include generic schema

 .../actions,owl-sirq.yaml                     |  5 +-
 .../interrupt-controller/fsl,intmux.yaml      |  5 +-
 .../interrupt-controller/fsl,irqsteer.yaml    |  5 +-
 .../interrupt-controller/ingenic,intc.yaml    |  5 +-
 .../intel,ixp4xx-interrupt.yaml               |  5 +-
 .../kontron,sl28cpld-intc.yaml                |  5 +-
 .../interrupt-controller/loongson,htvec.yaml  |  5 +-
 .../loongson,pch-msi.yaml                     |  5 +-
 .../loongson,pch-pic.yaml                     |  5 +-
 .../interrupt-controller/microchip,eic.yaml   |  5 +-
 .../interrupt-controller/mrvl,intc.yaml       |  3 +-
 .../interrupt-controller/mstar,mst-intc.yaml  |  5 +-
 .../interrupt-controller/mti,gic.yaml         |  5 +-
 .../nuvoton,wpcm450-aic.yaml                  |  7 ++-
 .../realtek,rtl-intc.yaml                     |  5 +-
 .../renesas,intc-irqpin.yaml                  | 28 +++++----
 .../interrupt-controller/renesas,irqc.yaml    |  5 +-
 .../sifive,plic-1.0.0.yaml                    |  5 +-
 .../interrupt-controller/ti,pruss-intc.yaml   |  5 +-
 .../interrupt-controller/ti,sci-inta.yaml     |  1 +
 .../interrupt-controller/ti,sci-intr.yaml     |  3 +-
 arch/arm/boot/dts/nspire-classic.dtsi         | 10 ++--
 arch/arm/boot/dts/nspire-cx.dts               |  4 +-
 arch/arm/boot/dts/nspire.dtsi                 | 60 +++++++++----------
 arch/arm/boot/dts/ox820.dtsi                  |  2 +-
 arch/arm/boot/dts/socfpga.dtsi                |  2 +-
 arch/arm/boot/dts/socfpga_arria10.dtsi        |  2 +-
 27 files changed, 129 insertions(+), 73 deletions(-)

Comments

Jonathan Neuschäfer March 17, 2022, 12:05 p.m. UTC | #1 
On Thu, Mar 17, 2022 at 12:57:01PM +0100, Krzysztof Kozlowski wrote:
> Include generic interrupt-controller.yaml schema, which enforces node
> naming and other generic properties.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---

Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

>  .../bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml
> index 9ce6804bdb99..285c20de0962 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml
> @@ -9,6 +9,9 @@ title: Nuvoton WPCM450 Advanced Interrupt Controller bindings
>  maintainers:
>    - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
>  
> +allOf:
> +  - $ref: /schemas/interrupt-controller.yaml#
> +
>  properties:
>    '#interrupt-cells':
>      const: 2
> @@ -21,14 +24,14 @@ properties:
>    reg:
>      maxItems: 1
>  
> -additionalProperties: false
> -
>  required:
>    - '#interrupt-cells'
>    - compatible
>    - reg
>    - interrupt-controller
>  
> +unevaluatedProperties: false
> +
>  examples:
>    - |
>      aic: interrupt-controller@b8002000 {
> -- 
> 2.32.0
>
Dinh Nguyen March 17, 2022, 2:39 p.m. UTC | #2 
On 3/17/22 06:56, Krzysztof Kozlowski wrote:
> Fixes dtbs_check warnings like:
> 
>    $nodename:0: 'intc@fffed000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
>   arch/arm/boot/dts/socfpga.dtsi         | 2 +-
>   arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index 7c1d6423d7f8..b8c5dd7860cb 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -46,7 +46,7 @@ pmu: pmu@ff111000 {
>   		      <0xff113000 0x1000>;
>   	};
>   
> -	intc: intc@fffed000 {
> +	intc: interrupt-controller@fffed000 {
>   		compatible = "arm,cortex-a9-gic";
>   		#interrupt-cells = <3>;
>   		interrupt-controller;
> diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
> index 3ba431dfa8c9..f1e50d2e623a 100644
> --- a/arch/arm/boot/dts/socfpga_arria10.dtsi
> +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
> @@ -38,7 +38,7 @@ pmu: pmu@ff111000 {
>   		      <0xff113000 0x1000>;
>   	};
>   
> -	intc: intc@ffffd000 {
> +	intc: interrupt-controller@ffffd000 {
>   		compatible = "arm,cortex-a9-gic";
>   		#interrupt-cells = <3>;
>   		interrupt-controller;

Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Claudiu Beznea March 18, 2022, 10:12 a.m. UTC | #3 
On 17.03.2022 13:56, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Include generic interrupt-controller.yaml schema, which enforces node
> naming and other generic properties.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

Acked-by: Claudiu Beznea <claudiu.beznea@microchip.com>

> ---
>  .../bindings/interrupt-controller/microchip,eic.yaml         | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml b/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml
> index 50003880ee6f..6ef8632b3f5e 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml
> @@ -13,6 +13,9 @@ description:
>    This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides
>    support for handling up to 2 external interrupt lines.
> 
> +allOf:
> +  - $ref: /schemas/interrupt-controller.yaml#
> +
>  properties:
>    compatible:
>      enum:
> @@ -51,7 +54,7 @@ required:
>    - clocks
>    - clock-names
> 
> -additionalProperties: false
> +unevaluatedProperties: false
> 
>  examples:
>    - |
> --
> 2.32.0
>