From patchwork Wed May 25 01:31:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 576107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56845C433EF for ; Wed, 25 May 2022 01:32:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238149AbiEYBcn (ORCPT ); Tue, 24 May 2022 21:32:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243234AbiEYBcm (ORCPT ); Tue, 24 May 2022 21:32:42 -0400 Received: from mo-csw.securemx.jp (mo-csw1515.securemx.jp [210.130.202.154]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6081353B55; Tue, 24 May 2022 18:32:41 -0700 (PDT) Received: by mo-csw.securemx.jp (mx-mo-csw1515) id 24P1WIja007424; Wed, 25 May 2022 10:32:18 +0900 X-Iguazu-Qid: 34trLtFNCcr2hTNsYq X-Iguazu-QSIG: v=2; s=0; t=1653442338; q=34trLtFNCcr2hTNsYq; m=6I5Zp9SHxPfpIAHDdJthesAiltPbzyvTI/Q27BPBxWM= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1512) id 24P1WHkF020508 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Wed, 25 May 2022 10:32:17 +0900 From: Nobuhiro Iwamatsu To: Joerg Roedel , Will Deacon , Rob Herring Cc: yuji2.ishikawa@toshiba.co.jp, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Nobuhiro Iwamatsu Subject: [PATCH 0/3] Add Visconti5 IOMMU driver Date: Wed, 25 May 2022 10:31:44 +0900 X-TSB-HOP2: ON Message-Id: <20220525013147.2215355-1-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, This series is the IOMMU driver for Toshiba's ARM SoC, Visconti5[0]. This provides DT binding documentation, device driver and MAINTAINER files. Best regards, Nobuhiro [0]: https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html Nobuhiro Iwamatsu (3): iommu: Add Visconti5 IOMMU driver iommu: bindings: Add binding documentation for Toshiba Visconti5 IOMMU device MAINTAINERS: Add entries for Toshiba Visconti5 IOMMU .../bindings/iommu/toshiba,visconti-atu.yaml | 62 +++ MAINTAINERS | 2 + drivers/iommu/Kconfig | 7 + drivers/iommu/Makefile | 1 + drivers/iommu/visconti-atu.c | 426 ++++++++++++++++++ 5 files changed, 498 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/toshiba,visconti-atu.yaml create mode 100644 drivers/iommu/visconti-atu.c