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[v3,0/7] clk: qcom: gcc-msm8916: modernize the driver

Message ID 20220619212735.1244953-1-dmitry.baryshkov@linaro.org
Headers show
Series clk: qcom: gcc-msm8916: modernize the driver | expand

Message

Dmitry Baryshkov June 19, 2022, 9:27 p.m. UTC 
Please excuse me for the spam, I've erroneously sent v2 without the
requested change.

Update gcc-msm8916 driver and bindings to use DT-specified clocks
rather than fetching the clocks from the global clocks list.

Changes since v2:
 - Use xo-board for the XO rather than RPM clock. This will be sorted
   out separately (requested by Stephan Gerhold).

Changes since v1:
 - None.

Dmitry Baryshkov (7):
  dt-bindings: clk: qcom,gcc-*: use qcom,gcc.yaml
  dt-bindings: clock: separate bindings for MSM8916 GCC device
  clk: qcom: gcc-msm8916: use ARRAY_SIZE instead of specifying
    num_parents
  clk: qcom: gcc-msm8916: move clock parent tables down
  clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down
  clk: qcom: gcc-msm8916: use parent_hws/_data instead of parent_names
  arm64: dts: qcom: msm8916: add clocks to the GCC device node

 .../bindings/clock/qcom,gcc-msm8916.yaml      |   61 +
 .../bindings/clock/qcom,gcc-msm8976.yaml      |   21 +-
 .../bindings/clock/qcom,gcc-msm8994.yaml      |   21 +-
 .../bindings/clock/qcom,gcc-msm8996.yaml      |   25 +-
 .../bindings/clock/qcom,gcc-msm8998.yaml      |   25 +-
 .../bindings/clock/qcom,gcc-other.yaml        |    1 -
 .../bindings/clock/qcom,gcc-qcm2290.yaml      |   25 +-
 .../bindings/clock/qcom,gcc-sc7180.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sc7280.yaml       |   21 +-
 .../bindings/clock/qcom,gcc-sc8180x.yaml      |   25 +-
 .../bindings/clock/qcom,gcc-sc8280xp.yaml     |   21 +-
 .../bindings/clock/qcom,gcc-sdm845.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sdx55.yaml        |   21 +-
 .../bindings/clock/qcom,gcc-sdx65.yaml        |   21 +-
 .../bindings/clock/qcom,gcc-sm6115.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sm6125.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sm6350.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sm8150.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sm8250.yaml       |   25 +-
 .../bindings/clock/qcom,gcc-sm8350.yaml       |   21 +-
 .../bindings/clock/qcom,gcc-sm8450.yaml       |   21 +-
 arch/arm64/boot/dts/qcom/msm8916.dtsi         |   14 +
 drivers/clk/qcom/gcc-msm8916.c                | 1020 +++++++++--------
 23 files changed, 669 insertions(+), 870 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml

Comments

Konrad Dybcio June 20, 2022, 12:12 p.m. UTC | #1 
On 19.06.2022 23:27, Dmitry Baryshkov wrote:
> Please excuse me for the spam, I've erroneously sent v2 without the
> requested change.
> 
Please excuse me, I didn't notice and gave you R-bs on v2 instead..

Konrad
> Update gcc-msm8916 driver and bindings to use DT-specified clocks
> rather than fetching the clocks from the global clocks list.
> 
> Changes since v2:
>  - Use xo-board for the XO rather than RPM clock. This will be sorted
>    out separately (requested by Stephan Gerhold).
> 
> Changes since v1:
>  - None.
> 
> Dmitry Baryshkov (7):
>   dt-bindings: clk: qcom,gcc-*: use qcom,gcc.yaml
>   dt-bindings: clock: separate bindings for MSM8916 GCC device
>   clk: qcom: gcc-msm8916: use ARRAY_SIZE instead of specifying
>     num_parents
>   clk: qcom: gcc-msm8916: move clock parent tables down
>   clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down
>   clk: qcom: gcc-msm8916: use parent_hws/_data instead of parent_names
>   arm64: dts: qcom: msm8916: add clocks to the GCC device node
> 
>  .../bindings/clock/qcom,gcc-msm8916.yaml      |   61 +
>  .../bindings/clock/qcom,gcc-msm8976.yaml      |   21 +-
>  .../bindings/clock/qcom,gcc-msm8994.yaml      |   21 +-
>  .../bindings/clock/qcom,gcc-msm8996.yaml      |   25 +-
>  .../bindings/clock/qcom,gcc-msm8998.yaml      |   25 +-
>  .../bindings/clock/qcom,gcc-other.yaml        |    1 -
>  .../bindings/clock/qcom,gcc-qcm2290.yaml      |   25 +-
>  .../bindings/clock/qcom,gcc-sc7180.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sc7280.yaml       |   21 +-
>  .../bindings/clock/qcom,gcc-sc8180x.yaml      |   25 +-
>  .../bindings/clock/qcom,gcc-sc8280xp.yaml     |   21 +-
>  .../bindings/clock/qcom,gcc-sdm845.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sdx55.yaml        |   21 +-
>  .../bindings/clock/qcom,gcc-sdx65.yaml        |   21 +-
>  .../bindings/clock/qcom,gcc-sm6115.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sm6125.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sm6350.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sm8150.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sm8250.yaml       |   25 +-
>  .../bindings/clock/qcom,gcc-sm8350.yaml       |   21 +-
>  .../bindings/clock/qcom,gcc-sm8450.yaml       |   21 +-
>  arch/arm64/boot/dts/qcom/msm8916.dtsi         |   14 +
>  drivers/clk/qcom/gcc-msm8916.c                | 1020 +++++++++--------
>  23 files changed, 669 insertions(+), 870 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml
>
Marijn Suijten June 27, 2022, 9:18 p.m. UTC | #2 
On 2022-06-20 00:27:33, Dmitry Baryshkov wrote:
> The gcc_mss_q6_bimc_axi_clk clock depends on the bimc_ddr_clk_src clock.
> Move it down in the file to come after the source clock.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>

> ---
>  drivers/clk/qcom/gcc-msm8916.c | 34 +++++++++++++++++-----------------
>  1 file changed, 17 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
> index 7962edbdbcf6..4d726ca4b0da 100644
> --- a/drivers/clk/qcom/gcc-msm8916.c
> +++ b/drivers/clk/qcom/gcc-msm8916.c
> @@ -2594,23 +2594,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
>  	},
>  };
>  
> -static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
> -	.halt_reg = 0x49004,
> -	.clkr = {
> -		.enable_reg = 0x49004,
> -		.enable_mask = BIT(0),
> -		.hw.init = &(struct clk_init_data){
> -			.name = "gcc_mss_q6_bimc_axi_clk",
> -			.parent_names = (const char *[]){
> -				"bimc_ddr_clk_src",
> -			},
> -			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> -			.ops = &clk_branch2_ops,
> -		},
> -	},
> -};
> -
>  static struct clk_branch gcc_oxili_ahb_clk = {
>  	.halt_reg = 0x59028,
>  	.clkr = {
> @@ -2860,6 +2843,23 @@ static struct clk_branch gcc_bimc_gpu_clk = {
>  	},
>  };
>  
> +static struct clk_branch gcc_mss_q6_bimc_axi_clk = {

How'd you settle on placing it here?  It isn't right below
bimc_ddr_clk_src, nor the last user of bimc_ddr_clk_src, doesn't seem to
have any alphabetical or .enable_reg related ordering to the other clks
either?

> +	.halt_reg = 0x49004,
> +	.clkr = {
> +		.enable_reg = 0x49004,
> +		.enable_mask = BIT(0),
> +		.hw.init = &(struct clk_init_data){
> +			.name = "gcc_mss_q6_bimc_axi_clk",
> +			.parent_names = (const char *[]){
> +				"bimc_ddr_clk_src",
> +			},
> +			.num_parents = 1,
> +			.flags = CLK_SET_RATE_PARENT,
> +			.ops = &clk_branch2_ops,
> +		},
> +	},
> +};
> +
>  static struct clk_branch gcc_jpeg_tbu_clk = {
>  	.halt_reg = 0x12034,
>  	.clkr = {
> -- 
> 2.35.1
>