From patchwork Fri Dec 23 07:07:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 636775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE0CAC4332F for ; Fri, 23 Dec 2022 07:07:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230095AbiLWHHY (ORCPT ); Fri, 23 Dec 2022 02:07:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229483AbiLWHHX (ORCPT ); Fri, 23 Dec 2022 02:07:23 -0500 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C081815F2E; Thu, 22 Dec 2022 23:07:21 -0800 (PST) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 23 Dec 2022 16:07:20 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 397272058B4F; Fri, 23 Dec 2022 16:07:20 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 23 Dec 2022 16:07:20 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 9127EA6B7B; Fri, 23 Dec 2022 16:07:19 +0900 (JST) From: Kunihiko Hayashi To: Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , Masami Hiramatsu Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH v4 0/1] dt-bindings: PCI: uniphier: Fix endpoint descriptions Date: Fri, 23 Dec 2022 16:07:12 +0900 Message-Id: <20221223070713.20549-1-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series fixes dt-schema descriptions for PCI endpoint controller implemented in UniPhier SoCs. Drop the patch in this series, "dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names", because this was done by the commit 4cc13eedb892 ("dt-bindings: PCI: dwc: Add reg/reg-names common properties"). Changes since v3: - Drop Patch 1 "dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names". Changes since v2: - Move some items to minimize if/then schemas in Patch 2 - Remove Patch 3 because the warning comment is for an unmerged source Changes since v1: - Fix "config" in the Patch 1 commit message to "addr_space" Kunihiko Hayashi (1): dt-bindings: PCI: uniphier-ep: Clean up reg, clocks, resets, and their names using compatible string .../pci/socionext,uniphier-pcie-ep.yaml | 76 ++++++++++++------- 1 file changed, 49 insertions(+), 27 deletions(-)